Row decoder having global and local decoders in flash memory dev

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

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365226, 36518513, 36518533, G11C 800

Patent

active

060646233

ABSTRACT:
The present invention relates to a row decoder in a flash memory device; and, more particularly, to a row decoder having global and local row decoders to reduce a loading of the high voltage and a chip area. The row decoder according to the present invention comprises a plurality of global row decoders for generating a first control signal and a second control signal according to an operation mode of the flash memory, wherein each global row decoder produces a first voltage level from a first power supply and a second voltage level from a second power supply, which respectively correspond to the first and second control signals, in response to first and second addresses from a predecoder; and a plurality of local row decoders for selecting a word line selection signal in response to the first and second control signals, wherein each local row decoder produces a third voltage level from a third power supply and a fourth voltage level from a fourth power supply which receives a third address from the predecoder and wherein the first control signal is out of phase from the second control signal.

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