Row decoder for a semiconductor memory device

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

Patent

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Details

36518908, 36518911, 36523008, G11C 800

Patent

active

058963456

ABSTRACT:
A row decoder for a semiconductor memory device including a pull-up signal generating part producing pull-up signals in response to output signals of a row address predecoder and applying the pull-up signals across word line driving part; and a pull-down signal generating part producing pull-down signals in response to output signals of the row address predecoder and applying the pull-down signals across the word line driving part. A pair of pull-up signals among the pull-up signals share one of the pull-down signals, thus controlling the word line driving part. The pull-down signal generating part includes NOR gates that perform NOR operation with respect to the output signals of the row address predecoder and the pull-up signals of the pull-up signal generating part, thus outputting the pull-down signals.

REFERENCES:
patent: 5148401 (1992-09-01), Sekino et al.
patent: 5402386 (1995-03-01), Tavrow et al.
patent: 5412331 (1995-05-01), Jun et al.
patent: 5490119 (1996-02-01), Sakurai et al.
patent: 5781497 (1998-07-01), Patel et al.

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