Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2007-01-09
2007-01-09
Auduong, Gene N. (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185110, C365S185170
Reexamination Certificate
active
11158346
ABSTRACT:
A row decoder circuit of a NAND flash memory and method of supplying an operating voltage using the same. To prevent an operating voltage (e.g., a program voltage, a pass voltage, or a read voltage) from being abnormally transferred to a gate of a memory cell because a pumping voltage is applied to a gate of a high-voltage pass transistor of the row decoder circuit in a level lower than a target voltage, the pumping voltage is first applied to the gate of the high-voltage pass transistor (i.e., precharging the gate of the high-voltage pass transistor) and next the operating voltage is applied to a drain of the high voltage pass transistor. Thus, the pumping voltage becomes higher than the target voltage due to a self-boosting effect through the structure of transistor, enabling the operating voltage to be normally transferred to the gate of the memory cell.
REFERENCES:
patent: 6236594 (2001-05-01), Kwon
patent: 6594178 (2003-07-01), Choi et al.
patent: 6731540 (2004-05-01), Lee et al.
Auduong Gene N.
Hynix / Semiconductor Inc.
Mayer Brown Rowe & Maw LLP
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