Row decoder circuit for electrically programmable and...

Details Row decoder circuit for electrically programmable and... Row decoder circuit for electrically programmable and...

2006-08-14

2008-11-04

Nguyen, Tan T. (Department: 2827)

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

C365S185230

Reexamination Certificate

active

07447103

ABSTRACT:
The invention relates to a row decoder circuit for non volatile memory devices of the electrically programmable and erasable type, for example of the Flash EEPROM type having a NOR architecture. The proposed row decoder circuit allows to carry out the erasing step very quickly, for example with a granularity emulating at least 16kB and even overcoming by at least 2kB Flash memories of the NAND type. The memory can thus maintain high performances in terms of random access speed but shows a high erasing speed typical of memory architectures of the NAND type.

REFERENCES:
patent: 6363020 (2002-03-01), Shubat et al.

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