Static information storage and retrieval – Addressing
Patent
1985-03-04
1986-10-28
Popek, Joseph A.
Static information storage and retrieval
Addressing
365189, G11C 800, G11C 702
Patent
active
046202994
ABSTRACT:
A logic decoder provides a true output signal at a first logic state when selected during an active cycle and during an inactive cycle, and at a second logic state when deselected. The logic decoder also provides a complementary output signal. A word line driver circuit couples decoded address signals to respective word lines when the output signal is in the first logic state. A coupling circuit couples one of first and second word lines to ground during the active cycle. A coupling transistor couples the first and second word lines together in response to receiving the complementary output signal at the first logic state.
REFERENCES:
patent: 4259731 (1981-03-01), Moench
Martino, Jr. William L.
Remington Scott
Clingan Jr. James L.
Motorola Inc.
Myers Jeffrey Van
Popek Joseph A.
Sarli, Jr. Anthony J.
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