Routing for integrated circuits

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular power supply distribution means

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Details

257208, 257210, 257211, 257758, 438622, H01L 2348

Patent

active

058941428

ABSTRACT:
Signals are routed within a routing channel between a first logic block and a second logic block. A power signal within a power conductor is routed as part of a bottom layer of the routing channel. The bottom layer is located above a substrate for the integrated circuit. A ground signal is also routed within a ground conductor as part of the bottom layer of the routing channel. Data lines are routed in a top layer of the routing channel. The data lines carry data signals within the routing channel. Connection lines are routed within a middle layer of the routing channel. The middle layer is between the bottom layer of the routing channel and the top layer of the routing channel. The connecting lines connect a subset of the data lines in the top layer, the ground conductor in the bottom layer and the power conductor in the bottom layer to the first logic block and to the second logic block.

REFERENCES:
patent: 5095352 (1992-03-01), Noda et al.
patent: 5111271 (1992-05-01), Hatada et al.
patent: 5742099 (1998-04-01), Debnath et al.

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