Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Wire contact – lead – or bond
Reexamination Certificate
2007-04-24
2007-04-24
Williams, Alexander Oscar (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Wire contact, lead, or bond
C257SE23020, C257SE21508, C257SE23021, C257S774000, C257S773000, C257S680000, C257S758000, C438S612000
Reexamination Certificate
active
11048204
ABSTRACT:
A novel pad structure for an integrated circuit component that utilizes a bump interconnect for connection to other integrated circuit components that produces a relatively uniform current distribution within the bump of the bump interconnect is presented. The pad structure includes an inner pad implemented on an inner conductive layer of the integrated circuit component, an outer pad implemented on an outer conductive layer of the integrated circuit component, and a plurality of vias connecting the inner pad and outer pad. The outer pad is sealed preferably around its edges with a passivation layer, which includes an opening exposing a portion of the outer pad. The vias connecting the inner pad and outer pad are preferably implemented to lie in a via region within the footprint of the pad opening.
REFERENCES:
patent: 5777486 (1998-07-01), Hsu
patent: 6504252 (2003-01-01), Matsunaga
patent: 6521996 (2003-02-01), Seshan
patent: 6825541 (2004-11-01), Huang et al.
patent: 7081405 (2006-07-01), Chien
patent: 2003/0167632 (2003-09-01), Thomas et al.
patent: 2004/0113261 (2004-06-01), Sunohara et al.
patent: 2005/0040527 (2005-02-01), Huang
patent: 2006/0043608 (2006-03-01), Bernier et al.
patent: 2006/0186539 (2006-08-01), Dauksher et al.
Dauksher Walter John
Graupp William S.
Richling Wayne Patrick
Avago Technologies General IP ( Singapore) Pte. Ltd.
Williams Alexander Oscar
LandOfFree
Routing design to minimize electromigration damage to solder... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Routing design to minimize electromigration damage to solder..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Routing design to minimize electromigration damage to solder... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3766005