Electrical computers and digital processing systems: multicomput – Computer-to-computer data routing
Reexamination Certificate
2006-02-28
2006-02-28
Barot, Bharat (Department: 2155)
Electrical computers and digital processing systems: multicomput
Computer-to-computer data routing
C709S245000, C709S247000, C370S395310
Reexamination Certificate
active
07007101
ABSTRACT:
A computer system having a network processor comprising a core processor and at least one microengine in operative communication with the core processor is provided. A table comprised of a plurality of entries with IP addresses associated therewith is built, wherein the entries are organized hierarchically according to an LC-Trie compression algorithm operating on the IP addresses. An Information packet is received within the computer system, wherein the information packet has a destination IP address associated therewith. The table is searched using an LC-Trie search algorithm to find a match between an IP address of an entry in the table and the destination IP address of the information packet. The information packet is transmitted to a forwarding IP address associated with the IP address of the matching entry. An interface is provided to accommodate communication between the core processor and microengine of the network processor.
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Barot Bharat
Harris Emily E.
Herink Kent A.
RadiSys Microware Communications Software Division, Inc.
Rosenberg Daniel A.
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