Rounding computing method and computing device therefor

Details Rounding computing method and computing device therefor Rounding computing method and computing device therefor

2011-03-22

2011-03-22

Malzahn, David H (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

Reexamination Certificate

active

07912888

ABSTRACT:
A computing device has a rounding processor that inputs therein a set of plural (K) input data IN1through INK comprising z bits. The rounding processor selects an ensured bit field depending upon the state of usage of each of specific areas A of upper z/2 bits of the 32-bit input data IN1through INK and rounds the corresponding input data to z/2. As a result of rounding processing, shift information SHIFT of lower (16−n) bits of each discarded non-specific area B is stored in a memory area. D10-1through D10-K of the rounded respective 16 bits are subjected to multiplication by a multiplier. A digit adjuster shifts multiplication results to the left on the basis of the shift information SHIFT respectively stored in the memory areas to adjust digits.

REFERENCES:
patent: 5644522 (1997-07-01), Moyse et al.
patent: 6233672 (2001-05-01), Lynch
patent: 6360204 (2002-03-01), Li et al.
patent: 2001/0023425 (2001-09-01), Oberman et al.

Affiliated with

Also associated with

Rating

Rounding computing method and computing device therefor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Rounding computing method and computing device therefor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Rounding computing method and computing device therefor will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2760045