Abrading – Abrading process – Glass or stone abrading
Reexamination Certificate
2000-02-15
2001-07-10
Banks, Derris H. (Department: 3723)
Abrading
Abrading process
Glass or stone abrading
C451S005000, C451S008000, C451S285000
Reexamination Certificate
active
06257961
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of Invention
This invention relates to a method of polishing a semiconductor wafer. More in particular, this invention to a method of adjusting the rotational speed of a turntable of a wafer polishing device for different batches of semiconductor wafers to be polished in order to consistently obtain polished wafers having excellent flatness.
2. Description of Related Art
One of the final steps in a conventional semiconductor wafer shaping process is a polishing step to produce a highly reflective and damage-free surface on one face or both faces of the semiconductor wafer. Polishing of the semiconductor wafer is most typically accomplished by the well-known mechanochemical process in which a rotating polishing pad rubs a polishing slurry against the wafer. In a conventional semiconductor wafer polishing device, wafers to be polished are mounted upon a turntable that rotates the wafers. The wafers upon the turntable and the polishing pad are brought into contact in order to effect polishing of the wafers.
Semiconductors wafers must be polished particularly flat in preparation for the formation of circuits on the wafers by well known procedures. Flatness of the wafer surface on which circuits are to be printed is critical in order to maintain resolution of the lines, which can be as thin as 1 micron or less.
Flatness of a wafer is quantified in part by a total thickness variation (TTV) measurement. TTV is defined as the difference between the maximum and the minimum thicknesses of the wafer. Total thickness variation in the wafer is a critical indicator of the quality of the polish of the wafer.
In conventional wafer polishing, some of the frictional heat generated by the rubbing action of the wafer, polishing pad and slurry is transferred to the polishing block and the polishing turntable. This heat transfer induces temperature gradients through the polishing block and turntable which cause thermal expansion of the polishing block and turntable. The thermal expansion adversely affects the flatness of the polishing block and turntable and therefore adversely affects the flatness of polished wafers obtained, particularly if the thermal expansion is uncontrolled and varies from different batches of wafers to be polished by the polishing device.
For example, in the idle time between polishing cycles, the induced distortion in the turntable begins to dissipate as its temperature equalizes. If this idle time varies, successively polished wafers may show significant flatness variations. This is particularly problematic with respect to occasional periods of downtime that occur with a particular polishing device.
Procedures for dealing with the restarting of the polishing device after a downtime period in order to continue to derive polished wafers having suitable flatness have included adjusting the pressure used in the polishing in order to offset the temperature induced distortions. However, this method requires precise control of the pressure adjustments and is not always successful in achieving wafers having suitable flatness, resulting in loss of wafers. Another procedure has included running several dummy polishing runs after restart with dummy wafers until the polishing device has returned to a steady state operation. However, this method is time consuming and costly.
U.S. Pat. No. 4,450,652 relates to a wafer workpiece polishing temperature control method and apparatus. Wafers are mounted upon a rotatable pressure plate assembly positioned in rotatable contact with a turntable assembly supported polishing pad, the turntable assembly having internal fluid cooling means, the wafer polishing temperature control being achieved through responsive closed loop electromechanical means activated by variation of polishing pressure upon the wafers and the polishing pad. In particular, the method controls the thermal bow distortion of a hollow internally cooled turntable having a polishing pad mounted on the top surface during polishing of semiconductor wafers held in pressurized rotatable contact with the polishing pad by circulating a heat transfer fluid through the turntable to maintain the bottom surface of the turntable at a constant temperature, sensing the temperature of said polishing pad, and regulating the pressure of the wafer against the polishing pad in response to said sensed temperature to maintain the polishing pad and top surface of the turntable at a constant temperature, whereby the temperature differential between the top and bottom surfaces of the turntable is maintained constant thereby maintaining the thermal bow distortion of the turntable constant.
What is sought, then, is a simpler and more cost effective method for assuring that wafers polished in a polishing device after a period of downtime exhibit a desired flatness.
SUMMARY OF THE INVENTION
It is thus one object of the present invention to develop a method of polishing semiconductor wafers in which the wafers polished immediately following a period of downtime of the polishing device posses a desired high degree of flatness.
It is still a further object of the present invention to develop a method of polishing semiconductor wafers as stated above, which method is capable of automation.
It is a still further object of the present invention to develop a method of polishing semiconductor wafers as stated above which can be practiced simply and easily within the context of large scale, mass production of polished semiconductor wafers.
These and other objects of the present invention are achieved by the present invention, which in one aspect is a method of obtaining polished semiconductor wafers with a polishing device, comprising conducting polishing of a first batch of semiconductor wafers with the polishing device at a turntable rotational speed to obtain a first batch of polished semiconductor wafers, experiencing a downtime following completion of the polishing of the first batch of semiconductor wafers with the polishing device, adjusting the turntable rotational speed for polishing of a next consecutive batch of semiconductor wafers, the adjustment being based upon a length of the downtime between the completion of the polishing of the first batch of semiconductor wafers and a start of polishing of the next consecutive batch of semiconductor wafers, and conducting polishing of the next consecutive batch of semiconductor wafers with the polishing device at the adjusted turntable rotational speed to obtain a next consecutive batch of semiconductor wafers.
These and other objects of the present invention are also achieved by the present invention, which in a further aspect is a method of polishing semiconductor wafers, comprising: determining turntable rotational speed adjustment data for a polishing device associated with various downtime periods between completion of polishing of a batch of semiconductor wafers and a start of polishing of a next consecutive batch of semiconductor wafers, the turntable rotational speed adjustment data comprising turntable rotational speed adjustments that maintain a desired flatness of semiconductor wafers from consecutive batches; following completion of polishing of a batch of semiconductor wafers with the polishing device at a standard turntable rotational speed for the polishing device, experiencing a downtime period; determining a length of the downtime period until a start of polishing of a next consecutive batch of semiconductor wafers with the polishing device; adjusting the turntable rotational speed in accordance with the turntable rotational speed adjustment data for the polishing device for the downtime determined; and conducting polishing of the next consecutive batch of semiconductor wafers at the adjusted turntable rotational speed.
The present method thus attains a method capable of easily maintaining a high degree of flatness for wafers polished in different batches with the same polishing device, even when a downtime period of operation occurs between batches.
REFERENCES:
patent: 4356669 (1982-11-01), Hoglund
patent: 4
Bopp James O.
Suzuki Yoshinori
Banks Derris H.
Oliff & Berridg,e PLC
SEH America Inc.
Shakeri Hadi
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