Room temperature drift suppression via soft program after erase

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185290, C365S185300, C365S185180, C365S185020

Reexamination Certificate

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07944746

ABSTRACT:
Providing for suppression of room temperature electronic drift in a flash memory cell is provided herein. For example, a soft program pulse can be applied to the flash memory cell immediately after an erase pulse. The soft program pulse can help to mitigate dipole effects caused by non-combined electrons and holes in the memory cell. Specifically, by utilizing a relatively low gate voltage, the soft program pulse can inject electrons into the flash memory cell proximate a distribution of uncombined holes associated with the erase pulse in order to facilitate rapid combination of such particles. Rapid combination in this manner reduces dipole effects caused by non-combined distributions of opposing charge within the memory cell, reducing room temperature program state drift.

REFERENCES:
patent: 6285588 (2001-09-01), Fastow
patent: 6643181 (2003-11-01), Sofer et al.
patent: 6834012 (2004-12-01), He et al.
patent: 2005/0073886 (2005-04-01), Hamilton et al.
patent: 2005/0237813 (2005-10-01), Zous et al.

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