ROM memory programming procedure using MOS technology with thin

Details ROM memory programming procedure using MOS technology with thin ROM memory programming procedure using MOS technology with thin

1988-05-27

1989-06-06

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 48, 437 52, 357 2312, 365104, 365182, H01L 21308, H01L 21316, G11C 1700

Patent

active

048371815

ABSTRACT:
The cell to be programmed is subjected to wet isotropic etching to remove the oxide from above, beside and partially beneath the strip of polycrystalline silicon which forms the cell gate. There follows implantation of a dopant of a type opposite to that of the source junction and drain junction performed through the gate strip. Finally reoxidation of the entire cell area is performed.

REFERENCES:
patent: 4113533 (1978-09-01), Okumura et al.
patent: 4356042 (1982-10-01), Gedaly et al.
patent: 4364165 (1982-12-01), Dickman et al.
patent: 4495693 (1985-01-01), Iwahashi et al.
patent: 4513494 (1985-04-01), Batra
patent: 4649629 (1987-03-01), Miller et al.

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