ROM memory cell with 2.sup.n FET channel widths

Details ROM memory cell with 2.sup.n FET channel widths ROM memory cell with 2.sup.n FET channel widths

1978-11-20

1980-03-04

Hecker, Stuart N.

Static information storage and retrieval

Read only systems

Semiconductive

365 45, G11C 1700

Patent

active

041920147

ABSTRACT:
An FET read-only memory cell capable of storing more than one bit per cell. The channel geometry of the FET cell is selected to provide an electrical output that is characteristic of a predetermined combination of bits. For example, the FET channel width can be selected to provide one of 2.sup.n predetermined output voltage values which correspond to the 2.sup.n possible arrangements of n bits. The read function utilizes 2.sup.n -1 sense amplifiers, which are connected to the FET. Each sense amplifier is selectively activated at a separate one of 2.sup.n -1 voltage levels which is intermediate two adjacent values of the 2.sup.n output voltages. The collective outputs of the sense amplifiers drive a logic circuit for decoding the values of the n data bits represented by the FET channel width.

REFERENCES:
patent: 3656117 (1972-04-01), Maley et al.
patent: 4054864 (1977-10-01), Audaire et al.
patent: 4085459 (1978-04-01), Hirabayashi

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