RLCD transconductance sample and hold column buffer

Details RLCD transconductance sample and hold column buffer RLCD transconductance sample and hold column buffer

2000-03-29

2002-12-17

Shankar, Vijay (Department: 2673)

Computer graphics processing and selective visual display system

Plural physical display element control system

Display elements arranged in matrix

C345S182000

Reexamination Certificate

active

06496173

ABSTRACT:

FIELD OF THE INVENTION
This invention pertains to the field of electronic circuits for driving reflective liquid crystal displays (RLCD).
BACKGROUND OF THE INVENTION
In a RLCD having a matrix of m horizontal rows and n vertical columns, each m-n intersection forms a cell or picture element (pixel). By applying an electric potential difference, such as 7.5 volts (v), across a cell, a phase change occurs in the crystalline structure at the cell site causing the pixel to change the incident light polarization vector orientation, thereby blocking the light from emerging from the electro-optical system. Removing the voltage across the pixel causes the liquid crystal in the pixel structure to return to the initial “bright” state. Variations in the applied voltage level produce a plurality of different gray shades between the light and dark limits.
The load that an RLCD presents to a driving circuit is best represented as the sum of the individual pixel capacitances and column line, which can be 12 picofarads (pF) for an individual column of an RLCD having 1024 rows. This load becomes 7.68 nanofarads (IF) for a group of 640 such columns.
At the individual columns, a comparator and a track-and-hold transfer gate are employed to instantaneously terminate the individual column voltage rise when the column capacitance has charged to a predetermined voltage level needed to produce a particular grayscale. As each column terminates at a unique level along the global voltage ramp, a separate pulse-length modulating signal is produced for each individual column.
At the end of a predetermined row time interval, the column voltages are discharged to a fixed reference voltage and the procedure is repeated for the next row. During discharge, a high instantaneous current spike may occur. Assuming all 1024 rows are charged at 7.5 v, a current discharge in approximately 30 nanoseconds (&eegr;s) will generate a peak current of approximately 2 amperes (A). This process is repeated for all the m rows of the LCD to complete a single frame. Repetition of the frame activity allows for the continual updating of the displayed information with refresh rates typically being 60 Hz for video displays. To better appreciate the above process, it would be beneficial to review U.S. Pat. No. 4,766,430 to Gillette et al. which is incorporated herein by reference.
A principal drawback of conventional high current switching circuits of the type just described is that any high speed voltage changes applied to the capacitive load of the RLCD produces very high instantaneous current spikes, i.e., 2 amperes, which in turn produce charge coupling errors within adjacent pixels. In addition, such high current switching devices are not easily configurable within an integrated circuit.
Thus, there is a demonstrated need for an improvement of existing voltage-driven RLCD column driver circuits which would reduce the instantaneous column switching currents and the associated crosstalk interference.
SUMMARY OF THE INVENTION
A system for generating an image in an RLCD from an Integrating Digital-to-Analog Converter (IDAC) that outputs a current pulse rather than a voltage pulse. The IDAC output in series with a plurality of low-current operational transconductance amplifiers (OTAs) is integrated and filtered by the intrinsic capacitance of the RLCD columns thereby reducing noise and power consumption. The IDAC is driven by a Look-Up-Table (LUT) within a Random Access Memory (RAM), which is used to store eight bit time-derivative digital values of the drive currents.


REFERENCES:
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