RISC system performing calls and returns without saving or resto

Details RISC system performing calls and returns without saving or resto RISC system performing calls and returns without saving or resto

1987-04-13

1993-05-25

Anderson, Lawrence E.

Boots, shoes, and leggings

364247, 36423213, 364247, 3642624, 364DIG1, 395375, G06F 940

Patent

active

052147860

ABSTRACT:
In a computer system equipped with a large number of registers which have an access time much shorter than that of a main memory, a register designating address part in which the assignment of an area register having a register address of a register area as its value and the assignment of a register displacement value expressing a relative register address within the register area are combined is provided in each instruction so that, even when physical registers are increased, save and restore of registers attendant upon task switches, etc. may be lessened to attain a raised speed of program run processing.
Besides, an address part for designating the main memory is provided in the same instruction.

REFERENCES:
patent: 3657736 (1972-04-01), Boom
patent: 3781810 (1973-12-01), Downing
patent: 3794980 (1974-02-01), Cogar
patent: 3972029 (1976-07-01), Bailey
patent: 4079448 (1978-03-01), N'Guyen et al.
patent: 4173782 (1979-11-01), Dixon
patent: 4241397 (1980-12-01), Strecker
patent: 4297743 (1981-10-01), Appell
patent: 4320456 (1982-03-01), Heise
patent: 4399507 (1983-08-01), Cosgrove
patent: 4410939 (1983-10-01), Kawakami
patent: 4428045 (1984-01-01), Davidian
patent: 4435765 (1984-03-01), Uchida et al.
patent: 4445173 (1984-04-01), Pilat
patent: 4450522 (1984-05-01), Pilat
patent: 4499535 (1985-02-01), Bachman
patent: 4600986 (1986-07-01), Scheuneman et al.
patent: 4611278 (1986-09-01), Boothroyd et al.
patent: 4613935 (1986-09-01), Couleur
patent: 4615006 (1986-09-01), Hirano
patent: 4633434 (1986-12-01), Scheuneman
patent: 4652993 (1987-03-01), Scheuneman et al.
patent: 4674032 (1987-06-01), Michaelson
patent: 4704679 (1987-11-01), Hassler
patent: 4730248 (1988-03-01), Watanabe
patent: 4733346 (1988-03-01), Tanaka
patent: 4740893 (1988-04-01), Bucholz
patent: 4761733 (1988-08-01), McCrocklin et al.
patent: 4766566 (1988-08-01), Chuang
patent: 4779187 (1988-10-01), Letwin
patent: 4811208 (1989-03-01), Myers
patent: 4829422 (1989-05-01), Morton
patent: 4833640 (1989-05-01), Baba
Reduced Instruction Set Computer Architectures for VLSI by Manolis G. H. Katevenis, MIT Press 1983 pp. 52-65, 136-145, 176-188, 194-198.
A VLSI RISC by David A. Patterson and Carlo H. Sequin 1982 IEEE pp. 8-18, 20.
Strategies for Managing the Register File in RISC. Yuval Tamir and Carlo Sequin 1983 IEEE pp. 977-986.
Micro & Mini Computers Systems Design Seminar Dec. 1971, pp. 1-24, Organisation of a Mini Computer.
Ring bank mode speeds 16-bit microoperation, New Electronics vol. 19, No. 20, Oct. 1986, p. 43.
A 16-bit microprocessor with multi bank architecture 1986 Proceedings Fall Joint Computer Conference, pp. 1015-1019.
Electronic Design vol. 33, No. 1, Jan. 1985, RISC Machines, pp. 180, 188.

Affiliated with

Also associated with

Rating

RISC system performing calls and returns without saving or resto does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with RISC system performing calls and returns without saving or resto, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and RISC system performing calls and returns without saving or resto will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-905173