Patent
1995-11-07
1998-04-07
Butler, Dennis M.
395800, 395559, G06F 1300
Patent
active
057375488
ABSTRACT:
A RISC-based microcontroller is described which uses "split" data buses in the functional areas of the ALU and the I/O peripheral control interface. Also, the "Harvard" architecture is applied with separate buses for instructions and operational data which are stored and supplied from separate memories, i.e., an instruction memory and a data memory. This architecture allows to run the microcontroller with timing and clocking schemes of higher frequencies resulting in faster speed and higher processing rates in MIPS. The different functional components of the microcontroller can be placed on a single VLSI chip while other designs with much less on-chip functions are also conceivable.
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patent: 5294928 (1994-03-01), Cooper et al.
patent: 5422807 (1995-06-01), Mitra et al.
patent: 5454114 (1995-09-01), Yach et al.
patent: 5581792 (1996-12-01), Caudel et al.
Allen Ray
Yach Randy L.
Butler Dennis M.
Reeves Matthew G.
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