Ripple counter circuit having reduced propagation delay

Details Ripple counter circuit having reduced propagation delay Ripple counter circuit having reduced propagation delay

1982-12-28

1985-06-04

Miller, Stanley D.

Electrical pulse counters, pulse dividers, or shift registers: c

Particular transfer means

Including logic circuit

377106, 377119, H03K 2326

Patent

active

045218986

ABSTRACT:
A ripple counter circuit is provided that reduces propagation delay inherent in flip-flops, and therefore, reduces the current required. A first flip-flop has a clock input responsive to a clock signal and a D input connected to a Q output. A second flip-flop has a clock input ANDed to a Q output of the first flip-flop and the clock signal. A propagation delay normally associated with the first flip-flop is eliminated from the Q output of the second flip-flop.

REFERENCES:
patent: 3422254 (1969-01-01), Lundin
patent: 3493872 (1970-02-01), Sebe
patent: 3517318 (1970-06-01), McDermond
patent: 3596186 (1971-07-01), Berney
patent: 3943378 (1976-03-01), Beutler
patent: 4406014 (1983-09-01), Doron

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