Ring oscillator VCO using a differential delay stage

Oscillators – Ring oscillators

Reexamination Certificate

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Details

C331S034000, C331S175000, C331S17700V

Reexamination Certificate

active

06304149

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to oscillators, especially to a ring oscillator using a chain of delay stages, commonly used for frequency synthesis or clock generation.
BACKGROUND OF THE INVENTION
Ring oscillator has been used for communication systems, particularly for frequency synthesis or clock generation apparatus. A ring oscillator circuit constitutes several delay stages arranged in a chain forming a ring structure. Each delay stage has an electronic circuit generating an output signal that is delayed in time from an input signal. The oscillation frequency of the ring oscillator is inversely proportional to the total delay of the delay stages in the chain.
Henceforth, the delay of each delay stage limits the oscillation frequency of the ring oscillator. Therefore, if the delay of the delay stage can not be smaller, the oscillation frequency cannot be increased. Accordingly, it is required to develop a delay cell having a low delay to achieve high frequency oscillation.
However, although an invention has a simple structure, it can not produce the delay less than that of an inverter for a given fabrication process because the inverter has the simplest structure as a delay stage.
Thus, there is proposed a skewed delay ring oscillator having improved structure, which overcomes the fundamental limit of a delay stage for a given fabrication process, and increases the oscillation frequency of the ring oscillator.
The delay stage of the skewed delay ring oscillator comprises an NMOS transistor and a PMOS transistor like an inverter delay stage. However, the gate of the PMOS in each delay stage of the skewed delay ring oscillator is not connected to the output of the previous stage, but connected to the output of one or several stages before the previous stage.
Normally, PMOS transistors are slower than NMOS transistors in a given fabrication process. However, the skewed delay ring oscillator allows the PMOS transistor to take an earlier signal than NMOS transistor and gives the PMOS transistor more time to handle the signal. Accordingly the skewed delay ring oscillator can achieve higher frequency oscillation.
However, since this skewed delay ring oscillator has single-ended structure, it has a poor characteristics with respect to the power supply injected noise, and has a disadvantage in that the skewed delay ring oscillator does not vary oscillation frequency.
SUMMARY OF THE INVENTION
The object of the present invention is to provide a delay varying capability for a delay stage that has a fully differential structure, having good rejection to the power supply injected noise, and to provide a frequency varying capability to the skewed ring oscillator.
The present invention is characterized in that the fully differential delay stage comprises two pair of NMOS transistors, one pair of PMOS transistors, and an optional pair of PMOS transistors. The first pair of NMOS transistors takes the differential inputs, in which one NMOS gate takes the positive polarity input signal, and the other NMOS gate takes the negative polarity input signal. The gates of the first pair of PMOS transistors are cross-connected to the differential outputs of the delay stage, which thus constitute a differential latch structure with the first pair of NMOS transistors. The gates of the second NMOS transistor pair are connected to the signal adjusting the delay of the delay stage. The gates of the optional PMOS transistor pair are connected to the differential outputs of the one stage before the previous stage through the skewed delay path and used to increase the oscillation frequency.


REFERENCES:
patent: 4884041 (1989-11-01), Walker
patent: 5475344 (1995-12-01), Maneatis et al.
patent: 5673008 (1997-09-01), Sumita
patent: 5841325 (1998-11-01), Knotts et al.
patent: 6005448 (1999-12-01), Pickering et al.

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