Oscillators – Ring oscillators
Reexamination Certificate
1999-09-17
2001-08-07
Grimm, Siegfried H. (Department: 2817)
Oscillators
Ring oscillators
C331S186000
Reexamination Certificate
active
06271732
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention, in general, relates to a ring oscillator and, more particularly, to a ring oscillator of the kind which is insensitive to variations in supply as well as substrate voltages to reduce jitter resulting from such voltages.
2. The Prior Art
For the reduction of jitter in a ring oscillator, WO 96/38913 and U.S. Pat. No. 5,559,476 suggest the use of current-controlled delay elements to isolate the influence of the supply noise on the stability of the frequency. Such elements are disadvantageous as they must be used for each stage of the ring oscillator. Furthermore, they require a control voltage the noise of which produces jitter.
U.S. Pat. No. 5,418,498 discloses a ring oscillator said to provide low jitter by utilizing gates and devices with time delays of excellent stability. However, the circuit is relatively complex.
EP0 805 553 A1 discloses an oscillator said to yield low jitter as a result of negative frequency feedback. Since it requires a second ring oscillator to provide the feedback, its disadvantages are rather obvious. Moreover, the second ring oscillator significantly increases the complexity of the circuit.
“Oscillator Jitter Due to Supply and Substrate Noise, IEEE 1998 Custom Integrated Circuits Conference, pp. 489-492” describes an alleged design optimization for MOS ring oscillators. However, jitter is only partly reduced.
OBJECT OF THE INVENTION
It is an object of the invention is to provide a structurally simple ring oscillator the frequency of which is insensitive to variations in the supply and the substrate voltage. By reducing the variations in its supply and substrate voltages, the ring oscillator in accordance with the invention provides for significantly reduced levels of jitter otherwise resulting from the noise of the supply and/or substrate voltage. In this manner, frequency-stable phase-locked loops (PLLs) can be realized. Such PLLs are required, e.g., for clock generation and clock recovery in high-speed digital circuits. Exemplary applications are microprocessors and memories.
SUMMARY OF THE INVENTION
In accordance with the invention, the object is accomplished by energizing a ring oscillator by two negatively correlated supply voltages, rather than by a single supply voltage, as has been conventional. As will be described, an inverting amplifier generates an auxiliary supply voltage V
DD2
from a global supply V
DD
, such that V
DD2
decreases if V
DD
increases and vice versa, m stages of an n-stage ring oscillator operating from V
DD2
and the remaining stages operating is from V
DD
. The total sensitivity K=df/dV
DD
is reduced to zero by proper dimensioning of the inverting amplifier, since the sensitivity contributions of the individual stages cancel each other. Hence, the mean error of a period (cycle jitter) and the so-called cycle-to-cycle jitter can be significantly reduced, since these quantities are approximately proportional to K. For differential CMOS ring oscillators the noise of the supply voltage and the noise of the substrate voltage are equivalent, since the corresponding sensitivities have the same absolute value, as outlined in “Oscillator Jitter Due to Supply and Substrate Noise. IEEE 1998 Custom Integrated Circuits Conference, pp. 489-492”. Therefore, the principle underlying the instant invention is also suited for minimizing jitter due to substrate noise.
REFERENCES:
patent: 5418498 (1995-05-01), DeVito et al.
patent: 5559476 (1996-09-01), Zhang et al.
patent: 5764110 (1998-06-01), Ishibashi
patent: 0805553 (1997-11-01), None
patent: WO 96/38913 (1996-12-01), None
Herzel et al.: Oscillator Jitter Due to Supply and Substrate Noise; IEEE,1998, Custom Integrated Circuits Conference; pp. 489-492.
Grimm Siegfried H.
Hormann Karl
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