Oscillators – Ring oscillators
Reexamination Certificate
2000-03-31
2004-02-10
Grimm, Siegfried H. (Department: 2817)
Oscillators
Ring oscillators
C331S179000
Reexamination Certificate
active
06690241
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device and a testing apparatus thereof. More particularly, the present invention relates to a semiconductor device which performs a prescribed operation in synchronization with a clock signal and a testing apparatus thereof.
2. Description of the Background Art
FIG. 29
is a circuit block diagram showing a structure of a conventional dynamic random access memory (hereinafter referred to as DRAM) chip. Referring to
FIG. 29
, this DRAM chip includes a power supply terminal
201
, a ground terminal
202
, an internal timer
203
and an internal circuit
204
. Internal timer
203
and internal circuit
204
both receive a power supply potential Vcc and a ground potential GND externally through power supply terminal
201
and ground terminal
202
. Internal timer
203
includes a self-oscillating oscillator such as a ring oscillator, and applies a clock signal &phgr; with a prescribed frequency to internal circuit
204
. Internal circuit
204
performs a prescribed operation (for example, refresh operation) in synchronization with that clock signal &phgr;.
In the conventional DRAM chip, however, there has been a problem that the value of the frequency of the clock signal &phgr; would be offset from the originally set value due to inconstancy in manufacturing such that desired operation characteristics cannot be obtained. For example, when the frequency of the clock signal &phgr; becomes unnecessarily high, power dissipation would increase to an unwanted extent or there would be erroneous operation in the system including DRAM because the internal circuit
204
cannot interlock with the external components. However, even a means for drawing the clock signal &phgr; externally to measure its frequency was not provided in the conventional DRAM chip.
SUMMARY OF THE INVENTION
Based on the foregoing, a first object of the present invention is to provide a semiconductor device in which an oscillation frequency of a built-in oscillator can be measured externally.
Also, it is a second object of the present invention to provide a semiconductor device in which a clock signal can be applied thereto externally so as to test the internal circuit.
It is a third object of the present invention to provide a semiconductor device in which an oscillation frequency of a built-in oscillator can be changed and set or controlled.
It is a fourth object of the present invention to provide a testing apparatus for measuring an oscillation frequency of an oscillator in a semiconductor device.
A first semiconductor device according to the present invention provides an output circuit for externally drawing a clock signal output from an oscillator. Accordingly, it is possible to draw externally the clock signal and to measure its frequency.
A second semiconductor device according to the present invention provides a selecting circuit for selecting one clock signal from an external clock signal input externally and an internal clock signal output from an oscillator. Accordingly, it is possible to apply a clock signal externally and test the internal circuit.
In addition, it is preferred that a signal input/output circuit is further provided for applying an internal clock signal to the internal circuit and externally outputting the internal clock signal in response to selection of the internal clock signal by the selecting circuit, and for blocking the input of the internal clock signal to the internal circuit and applying the external clock signal to the internal circuit in response to the selection of the external clock signal by the selecting circuit. Thus, it is also possible to draw externally the internal clock signal to measure its frequency.
A third semiconductor device according to the present invention provides an oscillator in which oscillation frequency can be changed and a setting circuit for changing and setting the oscillation frequency of the oscillator. Accordingly, even when the oscillation frequency of the oscillator is offset from the originally set value, it is possible to set the oscillation frequency of the oscillator to the originally set value.
The oscillator preferably includes a plurality of inverters connected in a ring shape and a variable capacitance circuit to which the output node of each inverter is connected. Thus, by changing and setting the capacitance value of variable capacitance circuit, it is possible to change and set the oscillation frequency of oscillator.
A transistor is preferably provided at each inverter of the oscillator so as to prevent a penetrating current. The transistor is connected to at least one of the portion between a power supply node of the inverter and the power supply line and the portion between a ground node of the inverter and the ground line. Its gate is supplied with an intermediate potential between the power supply potential and the ground potential. Thus, power consumption is reduced.
The variable capacitance circuit preferably includes a plurality of transfer gates and capacitors connected in series. The setting circuit includes a fuse which is provided corresponding to each transfer gate for fixing that corresponding transfer gate at a conductive state or non-conductive state by being disconnected. Thus, the capacitance value of the variable capacitance circuit can be set easily and without fail.
The oscillator preferably includes a plurality of inverters connected in a ring shape and first and second transistors for providing drive current to each inverter. Thus, changing and setting the oscillation frequency of the oscillator can be performed by changing and setting the input voltage of the first and second transistors.
The setting circuit preferably includes a constant current source, a third transistor connected in series with the constant current source, forming a mirror circuit with one of the first and second transistors, a plurality of fourth transistors connected in parallel with the third transistor, and a signal generating circuit provided corresponding to each of the fourth transistors to render the corresponding fourth transistor conductive or non-conductive in response to an external signal. Thus, it is made possible to change and set the input voltage of the first and second transistors easily.
The setting circuit preferably includes a plurality of constant current sources respectively for making a constant current to flow, a third transistor forming a current mirror circuit with one of the first and second transistors, and a fuse provided corresponding to each constant current source to fix the corresponding constant current source at an active state or inactive state. Thus, the input voltage of the first and second transistors can be changed and set easily and without fail.
It is preferred that a plurality of signal converting circuits, selecting circuits and internal circuits are further provided. A clock signal output from the oscillator is input to the signal converting circuit of the first stage. Each of the signal converting circuits converts the clock signal input from its preceding stage to have a period which is many times greater than the period of the preceding clock signal and outputs the converted clock signal to the following stage. The selecting circuit selects either one of the clock signal output from the oscillator and a plurality of clock signals output from a plurality of signal converting circuits. The internal circuit performs a prescribed operation in synchronization with the clock signal selected by the frequency is increased manifold.
The selecting circuit preferably includes a plurality of gate circuits provided corresponding to either one of the oscillator and the plurality of signal converting circuits, to which the clock signal output from the corresponding oscillator or the signal converting circuit is input. The selecting circuit further includes provided corresponding to each gate circuit to fix the corresponding gate circuit at a conductive state or non-conductive state by being disconnected. Th
Asakura Mikio
Hidaka Hideto
Kawagoe Tomoya
Ooishi Tsukasa
Grimm Siegfried H.
McDermott & Will & Emery
Mitsubishi Denki & Kabushiki Kaisha
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