Multiplex communications – Channel assignment techniques – Polling
Patent
1997-11-17
2000-06-06
Nguyen, Chau
Multiplex communications
Channel assignment techniques
Polling
370461, H04L 12403, H04L 1243
Patent
active
060728043
DESCRIPTION:
BRIEF SUMMARY
The present invention relates to data bus systems and, in particular, to a ring bus data transfer system useful for interconnecting consumer electronic equipment. Systems such as digital video signal processing systems process data at high data rates and require correspondingly high bandwidth bus systems for data communication. For example, digital video data in MPEG format exhibits data rates of 4 to 8 Mbits per second. A bus system based on packetized data may provide sufficient bandwidth. However, hardware and software for implementing packetized systems may be costly, making it impractical for consumer electronic equipment. In addition, a packet bus may require excessive "overhead" such as packet processing delays that preclude providing the high data rates required for MPEG data transfer. Also, MPEG decoders in video signal processing systems rely on data arriving at a relatively constant rate (i.e. having a relatively constant transmission delay). In other words, the data jitter must be relatively low. A bus system such as a packetized system may have too much variation in the data transmission delay among packets to operate properly with MPEG decoders.
A high data rate data transfer bus which may be constructed with relatively low cost hardware and software, which does not require a high data overhead, and which has a relatively constant transmission delay, is desirable for interconnecting consumer electronic equipment, in particular video signal processing equipment.
In accordance with principles of the present invention, a data transmission bus system includes a plurality of nodes coupled together by a ring bus. The ring bus transmits data in successive bus cycles, each bus cycle containing a plurality of bus words. One of the bus words in the bus cycle is a bus cycle synchronization word and the remainder of which are data words. The plurality of data words are allocated to a plurality of data channels.
Principles of the invention are embodied in the BeeBus (BBUS) which is a high data rate bus system that may be used for transfer of digital video data. The BBUS system is a time division multiplexed (TDM) bus with a total capacity of 88 Mbits/sec. The BBUS is designed to transfer data transparently from a source node to a destination node on transfer data transparently from a source node to a destination node on the bus. The BBUS operates by serially transmitting nine-bit words from node to node on the ring. Synchronization is maintained among the nodes by transmitting bus cycles of 88 nine-bit words, with the initial word of each bus cycle being a bus cycle synchronization word. Because it may be desired to connect to consumer electronic equipment which has been designed to attach to a prior art consumer electronic bus, called the CEBUS, the BBUS system includes a CEBUS-compatible control channel. One bit of the bus cycle synchronization word carries the data for the CEBUS-compatible control channel. The BBUS is designed to carry eight data channels, which can be grouped into blocks to provide the necessary capacity for any combination of number of channels and channel capacity as long as the total number of channels is eight or less, and the total assigned capacity is 88 Mbs or less.
The CEBUS-compatible control bus included in the BBUS system has a message structure that does not involve arbitration on transmission. Each device has a preassigned control channel slot with a capacity well in excess of 10 kbs. Each device has the channel capability to receive messages from 31 other devices simultaneously. However, it is envisioned that the receiving device will process only one message at a time. Thus arbitration will be done by the receiving device, not the transmitting device. The receiving device will process messages in a round robin fashion, one message at a time. Because the message length is about 32 bytes, all control channel messages will be sent with this fixed length, and all messages will start with the same control cycle time slot. This slot is the basic operating system sync. It occu
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Emanuel Peter M.
Lee Chiho Andrew
Nguyen Chau
Shoneman David T.
Thomson Consumer Electronics Inc.
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