Multiplex communications – Fault recovery – Bypass an inoperative station
Patent
1997-06-02
2000-04-25
Olms, Douglas W.
Multiplex communications
Fault recovery
Bypass an inoperative station
370241, H04J 116, H04J 314, G06F 1100, G08C 1500
Patent
active
060552255
ABSTRACT:
A floating clock data recovery circuit may be positioned anywhere in a chain of nodes. An N+1 length series of port bypass circuits are connected such that the output port of one is connected to the input of the next port bypass circuit. N is the number of desired nodes. One of the series of port bypass circuits will be used to "control" the positioning of the signal conditioning circuitry. When the control PBC is in operation, the loop is "broken" at that node. As a result, the signal conditioning circuitry may be placed anywhere in the chain of nodes.
REFERENCES:
patent: 4677614 (1987-06-01), Circo
patent: 5235689 (1993-08-01), Baker
patent: 5271014 (1993-12-01), Bruck et al.
patent: 5280607 (1994-01-01), Bruck et al.
patent: 5457556 (1995-10-01), Shiragaki
patent: 5487155 (1996-01-01), Drewry
patent: 5490007 (1996-02-01), Bennett
patent: 5513313 (1996-04-01), Bruck et al.
patent: 5535035 (1996-07-01), DeFoster
patent: 5638518 (1997-06-01), Malladi
patent: 5717796 (1998-02-01), Clendening
patent: 5812754 (1998-09-01), Lui
patent: 5841997 (1998-11-01), Bleiweiss
Fairchild Semiconductor Corporation, "DM74ALS157/DM74ALS158 Quad 1 of 2 Line Data Selector/Multiplexer", Feb. 1998.
Hewlett--Packard Company
Olms Douglas W.
Vincent David R
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