RF transmitter with stable on-chip PLL

Telecommunications – Receiver or analog modulated signal frequency converter – Local control of receiver operation

Reexamination Certificate

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C455S333000, C455S334000

Reexamination Certificate

active

07848725

ABSTRACT:
A phase locked loop (PLL) a phase detector, a charge pump, a loop filter, a controlled oscillator, and a feedback divider. The phase detector is coupled to produce a difference signal based on a difference between phase of a reference oscillation and phase of a feedback oscillation. The charge pump is coupled to convert the difference signal into an up-signal or a down signal. The loop filter coupled to filter the up signal or the down signal to produce a control signal. The controlled oscillator is coupled to generate an output oscillation based on the control signal. The feedback divider is coupled to generate the feedback oscillation from the output oscillation based on a divider value. The loop filter includes a first resistor-capacitor circuit and a second resistor-capacitor circuit. The first resistor-capacitor circuit is calibrated using a first calibration technique and the second resistor-capacitor circuit is calibrated using a second calibration technique.

REFERENCES:
patent: 2005/0264369 (2005-12-01), Sowlati et al.
patent: 2005/0266817 (2005-12-01), Welland et al.
patent: 2006/0141963 (2006-06-01), Maxim et al.
patent: 2007/0298747 (2007-12-01), Wu

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