RF transistor amplifier linearity using suppressed third...

Amplifiers – With semiconductor amplifying device – Including plural amplifier channels

Reexamination Certificate

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C330S286000

Reexamination Certificate

active

06819184

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates generally to RF and microwave transistor amplifiers, and more particularly the invention relates to improving linearity of such power amplifiers. RF power amplifiers typically comprise a plurality of transistor cells operating in parallel. The transistors comprise silicon laterally defused MOSFETS (LDMOSFET) or other semiconductor technologies including silicon bipolar, SIC MESFET, and III-V devices such as GAAS MESFET, InGaP HBT, and GaN HEMT.
Improved linearity and operation is a goal in RF power transistor technologies. There are many common factors in the determination of linearity in various RF power transistor technologies including changing input and impedance with signal level, changing capacitances and their derivatives with signal levels, breakdown and substrate conduction effects, class of operation, and changing transconductance and its derivatives with bias and signal levels.
The present invention is directed to improving linearity by reducing odd order transconductance derivatives.
BRIEF SUMMARY OF THE INVENTION
In accordance with the invention the linearity of RF power transistors is improved by reducing odd order transconductance derivatives by employing multiple transistors and derivative superposition with cancellation of positive and negative values of transconductance derivatives of the multiple transistors.
In one embodiment of the invention, the multiple transistors, each of which can include a plurality of transistor cells, are driven by a common RF input, but with different DC bias voltages. In another embodiment, the transistors and transistor cells have different conduction threshold voltages. This is accomplished by varying the channel doping of an FET, for example, during fabrication. In another embodiment of the invention, the phase of the RF input is varied among the transistors, with or without varying the DC bias voltages to the transistors or the threshold voltages. In yet another embodiment, the channel and gate width to length ratios of the transistors are varied, preferably with the different gate width transistors being on the same semiconductor die, thereby decreasing sensitivity to process variations and component tolerances.
The advantages of suppressing third order and other odd order transconductance is increased linearity or increased efficiency at a set linearity, which leads to improved manufacturing margins and smaller overall power amplifier sizes. The invention and objects and features of the invention will be more readily apparent from the following detailed description and appended claims when taken with the drawing.


REFERENCES:
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patent: 6448859 (2002-09-01), Morizuka
patent: 6614308 (2003-09-01), Moller et al.
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