RF power detector

Amplifiers – With semiconductor amplifying device – Including differential amplifier

Reexamination Certificate

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Details

C330S133000, C330S134000, C330S285000

Reexamination Certificate

active

06727754

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to the field of power amplifiers. More particularly, this invention relates to circuitry for detecting the output power of an RF power amplifier.
BACKGROUND OF THE INVENTION
In some applications utilizing a power amplifier, it is desirable to limit the peak voltage that the switching devices of the power amplifier are subjected to. For example, in CMOS devices, the transistor breakdown voltage may be only slightly greater than the supply voltage. Therefore, CMOS devices are not well suited to traditional power amplifier designs, where switching devices are subjected to voltages at least twice the supply voltage.
FIG. 1
is a schematic diagram of a conventional Class E amplifier. As shown, a transistor M
1
is connected between ground and an inductor L
1
which is connected to a voltage source V
dd
. The gate of the transistor M
1
is connected to an input signal Vi. The connection of the transistor M
1
and the inductor L
1
forms a node labeled Vd. The switching device M
1
, as well as other switching devices described may be comprised of any suitable switching devices, for example, MOSFETs or other transistor types. A capacitor C
1
is connected between Vd and ground. The amplifier includes a transformation network consisting of inductor L
2
and capacitor C
2
. The capacitor C
2
is connected to a load R
L
at output node V
o
.
FIG. 2
is a timing diagram illustrating the input signal Vi and the resulting voltage at Vd. As shown, the input signal Vi is a square wave signal switching between ground and V
dd
. When the input signal Vi is high (V
dd
), the transistor M
1
is turned on, holding Vd to ground. When the input signal Vi transitions to low, transistor M
1
turns off and the voltage at Vd rises above V
dd
. During this time, the transistor M
1
must sustain this high drain-to-source voltage. After peaking, the voltage at Vd decreases until it reaches ground. In a typical prior art Class E design, this peak voltage is approximately 3.6 V
dd
. Although the peak voltage can be reduced slightly, it can not be decreased below about 2.5 V
dd
since the average voltage at Vd must equal V
dd
. Designs such as that shown in
FIG. 1
are not well suited to certain device technologies, such as CMOS, where transistor breakdown voltages are only slightly higher than the supply voltage.
It can therefore be seen that there is a need for amplifier designs where the peak voltages applied to the transistors of the amplifier are reduced so that they are below the transistor breakdown voltages of the devices being used to implement the design.
Another problem relating to amplifiers relates to the use of differential circuits. It is difficult to perform differential-to-single-ended conversion when a single ended load is required with high efficiency. Therefore, there is a need for improved differential-to-single-ended conversion designs.
Another problem relating to amplifiers relates to detecting the output power of an amplifier for purposes of controlling the output power of the amplifier. For example, in a power regulation circuit for a cellular telephone power amplifier, there is a need to sense the power delivered to the antenna. The sensed power is used to help control the output power of the power amplifier.
SUMMARY OF THE INVENTION
An apparatus of the invention is provided for a circuit for generating a control signal for controlling the output power of a power amplifier of a wireless device by comprising: a power detector coupled to the output of the power amplifier for generating a detector output signal; and a variable gain amplifier coupled to the power detector for amplifying the detector output signal to a desired level, wherein the value of the control signal generated by the circuit is a function of the gain of the variable gain amplifier.
Another embodiment of the invention provides a method of controlling the output power of an RF power amplifier comprising the steps of: detecting the output power of the RF power amplifier and generating a first signal from the detected output power; amplifying the first signal using a variable gain amplifier; generating a gain control signal from the output of the amplifier and from a reference signal; using the gain control signal to set the gain of the amplifier; generating a second signal by conditioning the gain control signal; and using the second signal to control the output power of the RF power amplifier.
One embodiment includes an integrated circuit for use with an external directional coupler comprising: an RF power amplifier formed on the integrated circuit, wherein the integrated circuit is configured such that an external directional coupler can be used to generate a detector signal based on the output power of the RF power amplifier; and a power detector formed on the same integrated circuit to generate an output signal based on the detector signal.
Other objects, features, and advantages of the present invention will be apparent from the accompanying drawings and from the detailed description that follows below.


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