Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Reexamination Certificate
2001-08-13
2004-10-05
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
C257S528000, C257S774000, C257S728000, C257S724000, C257S621000, C438S957000, C438S329000
Reexamination Certificate
active
06800920
ABSTRACT:
BACKGROUND OF THE INVENTION
(1) Field of the Invention
This invention relates to a technology for making smaller and lighter RF passive circuits and RF amplifiers equipped with via-holes.
(2) Prior Art
Recently, various types of mobile communication tools, such as portable phones or portable information terminals have been commercialized all over the world. As portable phones, cellular phones for bands of 900 MHz and 1.5 GHz, and Personal Handyphone System (PHS) for a band of 1.9 GHz are two examples that are commercialized in Japanese market. Other examples include world-famous GSM, and CDMA among the technologies adopted in PCS (Personal Communications Services) in the U.S.A.
As a third-generation mode following the analogue mode and the digital mode, IMT2000 is planned to be commercialized in the future.
In developing mobile communication terminals especially portable terminals, it is an inevitable trend to seek smaller and lighter terminals. Accordingly, it is important to achieve a technology for making smaller and lighter components for these terminals.
As a trend, it is desired to make high frequency components of the portable terminals as a monolithic microwave IC (MMIC). The MMIC, in which active elements, their matching circuits, and bias circuits are integrated on the same substrate, is more advantageous in making smaller products than a Hybrid IC which is structured to have circuits and bias electricity-feeding circuits as outside-chips.
Even using the MMIC, it is required to ground circuit elements. Conventional grounding methods include a method of wire-bonding from the surface of semiconductor substrates, and a via-hole method. It is more effective to use the via-hole method in achieving high-quality and low cost for packaging, which makes the via-hole method more frequently adopted in the MMIC.
The following is a description of an example of a conventional type of RF passive circuit and RF amplifier equipped with via-holes with reference to 
FIGS. 8A-8D
.
FIG. 8A
 is a schematic circuit diagram of a conventional RF amplifier which includes RF passive circuits equipped with via-holes, and 
FIGS. 8B and 8C
 are pattern diagrams of conventional RF passive circuits both equipped with a via-hole.
As 
FIG. 8A
 shows, a source-ground type of RF amplifier is constructed by connecting: a gate bias resistance 
805
 and an input matching circuit 
806
 to a gate terminal 
802
; a drain voltage feeding circuit 
807
 and an output matching circuit 
808
 to a drain terminal 
803
; and a source terminal 
804
 to a ground terminal 
809
, in the field effective transistor (FET) 
801
. An input terminal 
810
 and an output terminal 
811
 are both 50 &OHgr; impedance, and the input matching circuit 
806
 and the output matching circuit 
808
 are adjusted to 50 &OHgr;. Further, each of an input DC cut capacitor 
812
 and an output DC cut capacitor 
813
 is inserted to the input side and the output side respectively.
The input matching circuit 
806
 consists of an input matching parallel inductor 
814
, an input matching parallel capacitor 
815
, and an input matching serial inductor 
816
. The input matching parallel capacitor 
815
 is grounded by an input matching circuit via-hole 
821
.
The output matching circuit 
808
 consists of an output matching serial inductor 
817
, and an output matching parallel capacitor 
818
. The output matching parallel capacitor 
818
 is grounded by an output matching circuit via-hole 
822
.
The drain voltage feeding circuit 
807
 consists of a choke inductor 
819
 and a bypass capacitor 
820
. The bypass capacitor 
820
 is grounded by a drain voltage feeding circuit via-hole 
823
.
FIGS. 8B and 8C
 are both pattern diagrams of an RF passive circuit with a via-hole; each of them shows the input matching circuit 
806
 and the drain voltage feeding circuit 
807
 respectively. 
FIG. 8D
 shows a cross-sectional view taken along line (A-A′) of FIG. 
8
B. The following is a description of a common part between the input matching circuit 
806
 and the drain voltage feeding circuit 
807
, taking an example of the input matching circuit 
806
.
Constituting elements of the aforementioned input matching circuit 
806
 is made, as a semiconductor substrate, on a surface of a GaAs substrate 
824
. Both of the input matching parallel inductor 
814
 and the input matching serial inductor 
816
 are made in a spiral-electrode-pattern, and the input matching parallel capacitor 
815
 is made in an MIM(Metal-Insulator-Metal) capacitor pattern.
As 
FIG. 8D
 shows, the spiral-electrode-pattern is made on the GaAs substrate 
824
 which is covered by an insulator film 
834
 such as silicon oxide. Specifically, the spiral-electrode-pattern is a structure where a lower wiring metal layer 
831
 which is made by gold/titanium vacuum evaporation is connected to an upper wiring metal layer 
830
 made by gold-plating by means of a contact hole 
833
, with a between-layer insulator film 
832
 in between.
On the other hand, the MIM capacitor is a structure where an upper wiring metal 
829
 is formed on a dielectric layer 
828
 under which is an electrode extended from the lower wiring metal layer 
831
; the upper wiring metal 
829
 is made by gold/titanium vacuum evaporation and the dielectric layer 
828
 is titanium oxide strontium (SrTiO3:STO) with a permittivity of 100 or more. The end of the electrode extended from the upper wiring metal 
829
 is connected to a ground metal layer 
826
 which is situated on the via-hole, as 
FIGS. 8B and 8C
 show.
The input matching circuit via-hole 
821
 can be formed by etching from the main surface of the GaAs substrate 
824
 where circuit elements were made (a surface via-hole). Or, it could also be formed by etching from the other main surface (a backside via-hole). Inside the via-hole 
821
, an electric conducting film is conducted to a backside ground metal 
829
. This electric conducting film is electrically connected to the upper wiring metal 
829
 of the MIM capacitor through the ground metal layer 
826
.
Further, as depicted in 
FIG. 8C
, constituting elements of the drain voltage feeding circuit 
807
 are formed, as a semiconductor substrate, on the surface of the GaAs substrate 
824
. As for the choke inductor 
819
, a spiral-electrode-pattern is used, and as for the drain voltage feeding circuit via-hole 
823
, either a surface via-hole or a backside via-hole is used for forming.
Note that a feeding terminal 
825
 is structured by extending a drain voltage terminal 
836
 from the lower wiring metal layer 
831
 through an extending wire 
835
.
Thus structured as above, the following constituting elements of the RF passive circuit are formed on and through the GaAs substrate: the spiral inductor, the MIM capacitor, and the via-hole. Moreover, as 
FIG. 8C
 shows, the above three elements are positioned at a different location two-dimentionally, and are connected to each other by wiring. The elements constitute the RF amplifier with a help of the input matching circuit 
808
 and the drain voltage feeding circuit 
807
.
As seen above, the conventional type of RF amplifiers and RF passive circuits cannot be made smaller in size, due to the two-dimensional positioning of the constituting elements of the drain voltage feeding circuit 
807
, which inherently take much space.
SUMMARY OF THE INVENTION
Based on the stated problem, the object of the present invention is to realize smaller RF passive circuits and RF amplifiers equipped with via-holes.
To achieve the above object, the present invention is characterized by a structure of being equipped with a spiral inductor formed on a main surface of a semiconductor substrate, and a via-hole made from the main surface and through the semiconductor substrate. The via-hole is made at the position adjacent to the spiral inductor, with a dielectric layer and a wiring metal layer formed on a metal film of the via-hole so as to hold a capacity element between the metal film and the wiring metal layer, and the spiral inductor extends at one end to be electrically connected with the wiring metal l
Flynn Nathan J.
Mandala Jr. Victor A.
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