RF integrated circuit test methodology and system

Details RF integrated circuit test methodology and system RF integrated circuit test methodology and system

2011-03-29

2011-03-29

Patel, Paresh (Department: 2858)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S762020

Reexamination Certificate

active

07915909

ABSTRACT:
Over the air or radiated testing of an RF microelectronic or integrated circuit device under test (DUT) that has an integrated millimeter wave (mmw) antenna structure, is described. The antenna structure may have multiple elements in an array design that may be driven and/or sensed by integrated RF transmitter and/or receiver circuitry. An interface printed wiring board (e.g., a tester load board or a wafer probe card assembly) has formed in it a mmw radiation passage that is positioned to pass mmw radiation to and/or from the integrated antenna of the DUT. Test equipment may be conductively coupled to contact points of the interface board, to transmit and/or receive signals for testing of the DUT and/or provide dc power to the DUT. A test antenna is designed and positioned to receive and/or transmit mmw radiation through the passage, from and/or to the integrated DUT antenna. Other embodiments are also described and claimed.

REFERENCES:
patent: 5647756 (1997-07-01), Twigg et al.
patent: 5781018 (1998-07-01), Davidov et al.
patent: 6201403 (2001-03-01), Rollin et al.
patent: 6236223 (2001-05-01), Brady et al.
patent: 6791317 (2004-09-01), Walsh et al.
patent: 7112952 (2006-09-01), Arai et al.
patent: 7187293 (2007-03-01), White et al.
patent: 7279920 (2007-10-01), Kramer
patent: 7301458 (2007-11-01), Carrender et al.
patent: 7375636 (2008-05-01), Martin
patent: 2002/0196029 (2002-12-01), Schmidt
patent: 2004/0263189 (2004-12-01), Perry
patent: 2005/0032515 (2005-02-01), Mastio
PCT International Search Report (dated Jan. 16, 2009), International Application No. PCT/US2008/076063, International Filing Date-Nov. 9, 2008, (16 pages).
Park, Piljae, et al., “A Feasibility Study of On-Wafer Wireless Testing”, VLSI Design, Automation and Test, Apr. 23, 2008, IEEE International Symposium on, IEEE, Piscataway, NJ, USA, XP031272495, ISBN: 978-1-4244-1616-5, (pp. 299-302).
Schaub, Keith, et al., “Evolutionary Changes for RF Device Testing”, EE Evaluation Engineering, Oct. 2006 [Online], vol. 45, No. 10, XP002508668, Nelson Publishing USA, Retrieved from the Internet: URL: http://archive.evaluationengineering.com/archive/articles/1006/1006evolutionary.asp (retrieved Dec. 16, 2008), (pp. 12-18).
Gahagan, Dean A., “RF (Gigahertz) Ate Production Testing on Wafer: Options and Tradeoffs”, ITC International Test Conference, IEEE 1999, Paper 15.2, (pp. 388-395).

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