Etching a substrate: processes – Nongaseous phase etching of substrate – Etching inorganic substrate
Reexamination Certificate
1999-06-02
2001-12-25
Gulakowski, Randy (Department: 1746)
Etching a substrate: processes
Nongaseous phase etching of substrate
Etching inorganic substrate
C216S002000, C438S614000, C438S754000, C438S109000, C252S079100, C029S825000, C029S840000, C257S737000, C257S738000
Reexamination Certificate
active
06332988
ABSTRACT:
FIELD OF THE INVENTION
This invention generally relates to rework, such as rework of semiconductor wafers. More particularly, it relates to a method of removing terminal metals, such as lead-tin solder bumps and their associated metal layers, from a semiconductor wafer without damaging remaining materials on the wafer, such as aluminum lines.
BACKGROUND OF THE INVENTION
Evaporated solder bumps or C4's have long been in use for bonding integrated circuit chips to a next level of assembly, such as a ceramic package. Traditional solder bumps have involved evaporating a series of layers on each wafer: lead and tin are evaporated on a thin layer of gold on layers of copper, chrome-copper, and chrome. The lead and tin layers are evaporated through a single thin metal shadow mask that is aligned to vias that open to chip metallization. The shadow mask is clamped in close contact with the wafer. This process has produced a very high yield of wafers with terminal metals. However, as the number of solder bumps needed on each chip has been increasing with each generation of logic chips, the shadow mask technique has begun to reach its limit in reducing the size and more closely packing the solder bumps.
A new method has been developed to electroplate solder bumps on wafers, as described in commonly assigned U.S. Pat. No. 5,503,286 to Nye et al, incorporated herein by reference. This technique has the potential to substantially lower cost, improve the efficiency of use of the solder materials, shrink the size of each solder bump, move the solder bumps closer together, and increase the number of solder bumps that can be placed on each chip. However, the electroplated process has required more complex processing and a more complex stack of metals under the solder bumps.
This more complex electroplating process has expanded the need to correct process errors (as compared with the well-established evaporated process) so that any wafers that are misprocessed can be reworked. The difficulty has been in removing each layer of the stack of layers of metal without any of the etchants damaging other insulating or metal layers that are to remain permanently on the wafer. As described in commonly assigned U.S. Pat. No. 5,462,638, incorporated herein by reference, there is concern that etchants could seep into the chip through pinholes and damage the internal structure of the chip, particularly aluminum lines. Without an adequate solution to this problem, wafers that were misprocessed had to be scrapped. Thus, a better solution for rework is required to remove the terminal metal layers on a wafer without the danger of damaging permanent metal or insulating layers on the wafer, and this solution is provided by the following invention.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a process for removing a metal layer from a stack of metal layers without etching that layer.
It is yet another object of the present invention to provide a process for reworking electroplated solder bump wafers.
It is a further object of the present invention to provide a process for sideways etching one metal layer to remove layers above that metal layer.
It is a feature of the present invention that intermetallic layers of copper-tin and chrome-copper are removed by lateral etching an underlying tungsten containing layer.
It is another feature of the present invention that lead and tin are removed as a preliminary step so as to avoid their interfering with the lateral etching of the tungsten containing layer.
It is an advantage of the present invention that all solder bump metallurgy is removed without damaging underlying aluminum lines.
These and other objects, features, and advantages of the invention are accomplished by a removal process that comprises the step of providing a substrate having a first metal layer on a second metal layer on a permanent third layer. The next step involves removing the first metal layer and the second metal layer from the substrate by sideways etching the second metal layer with an etchant that does not substantially etch the first metal layer and that does not substantially damage the permanent third layer.
One embodiment of the invention is a terminal metal rework process. This process includes the step of providing a semiconductor wafer having terminal metals with a solder bump on layers of underlying metals, wherein the layers of underlying metals include a first metal layer on a second metal layer on the wafer. The wafer further comprises a permanent third aluminum metal layer, wherein the second metal layer contacts the permanent third aluminum metal layer. The next step involves removing the solder bump with a solder etchant. Next, the first metal layer and the second metal layer are removed from the substrate by sideways etching the second metal layer with an etchant that does not substantially etch the first metal layer and that does not substantially damage the permanent third aluminum metal layer.
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Method to Monitor and Control Boil-Over of Hydrogen Peroxide Based Solutions, IBM Technical Disclosure Bulletin, vol. 38, No. 12, Dec. 1995.
Berger, Jr. Russell G.
Gregoritsch, Jr. Albert J.
Gulakowski Randy
International Business Machines - Corporation
Kornakov M.
Walter, Jr Howard J.
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