Reusable, built-in self-test methodology for computer systems

Details Reusable, built-in self-test methodology for computer systems Reusable, built-in self-test methodology for computer systems

2006-12-26

2006-12-26

Hoff, Marc S. (Department: 2857)

Data processing: measuring, calibrating, or testing

Measurement system

Performance or efficiency evaluation

C702S118000, C324S763010, C714S043000, C714S044000

Reexamination Certificate

active

07155370

ABSTRACT:
A methodology for testing a computer system using multiple test units, each test unit being associated with its respective core function circuitry. The core circuitry and its respective test unit are located in a primary integrated circuit component of the computer system, such as a processor, memory, or chipset. The on-chip test units communicate with one another and with other parts of the system, to determine whether a specification of the computer system is satisfied, without requiring a processor core of the computer system to execute an operating system program for the computer system.

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