Retiming circuit for pulse signals, particularly for microproces

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G06F 900

Patent

active

048112828

ABSTRACT:
A digital retiming circuit for synchronizing a pulse signal with a local clock aligns incoming pulse signals with the local clock using a fully digital technique. The incoming signal is stored in a storage circuit which is disabled until the pulse signal has gone low before rising again. The output of the storage circuit is used to trigger a flip-flop, whose output is converted into a signal aligned with the local clock by means of a cascade of inverters and transfer gates enabled by the local clock. A trigger circuit resets the flip-flop in step with the clock whenever the incoming pulse signal is low.

REFERENCES:
patent: 4327442 (1982-04-01), Athenes
patent: 4387341 (1983-06-01), Martinson
patent: 4583007 (1986-04-01), Paski

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