Multiplex communications – Communication techniques for information carried in plural... – Combining or distributing information via time channels
Reexamination Certificate
1997-12-24
2001-05-29
Nguyen, Chau (Department: 2663)
Multiplex communications
Communication techniques for information carried in plural...
Combining or distributing information via time channels
C375S372000
Reexamination Certificate
active
06240106
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a retiming arrangement for use in an SDH (Synchronous Digital Hierarchy) data transmission system. In particular the invention is concerned with the provision of an arrangement by which third parties wishing to use an SDH link which is controlled by another operator may carry their own timing and other information across that network.
Third party timing is defined when the timing to be carried in a primary rate signal originates from a source which is not synchronous with the source used to time the SDH network. Third party timing is therefore plesiochronous to the bearer clock.
In SDH, primary rate signals are mapped into high bit rate Synchronous Transport Modules (STM-N), at the insertion point of the network using virtual containers (VC) and tributary units (TU), the size and type of which depends on the data rate of the signal being carried. Many of these TU's are multiplexed together into a single STM-N. At the extraction point the STM-N is demultiplexed and demapped back into primary rate signals. However the signals suffer from phase and frequency distortions which effect the quality of the signal when used for transporting timing information. The key component in SDH systems used to reduce these distortions is the so-called desynchronizer or retiming arrangement.
SUMMARY OF THE INVENTION
The present invention arose in an attempt to improve the system disclosed in our co-pending British patent application 9114841.1, published as GB 2257603A on Jan. 13, 1993, the contents of which are hereby incorporated into this application by this reference. The aim of the present invention is to permit third parties using their own primary rate timing source to carry timing information over an SDH network which is operated by a first party. This is not currently possible and as shown in
FIG. 1B
of the above mentioned document a separate channel needs to be provided to carry this timing information.
In the above mentioned document either both pointer data and Bit Justification data are used for retiming purposes, or neither such data, timing being provided at the primary rate output on the assumption that the primary rate signal is synchronised to the bearer. The applicants have appreciated that if Bit Justification data is used without the Pointer data, then an SDH network can be adapted to carry such third party timing information without providing a separate link.
In one aspect the invention provides a retiming arrangement for an SDH (Synchronized Digital Hierarchy) data transmission system by which third parties may use an SDH link, comprises an input (
5
) for receipt of a multiplexed STM (Synchronous Transport Module) a signal, a clock recovery circuit (
20
) for recovering a clock signal from the STM signal, a demultiplexer (
21
) for demultiplexing the STM signal into a plurality of TU (Tributary Unit) signals, a pointer processor (
25
) for reading pointer data from a TU signal, a bit dejustifier (
28
) for reading bit justification data from the TU signal, a buffer store (
30
) with a store monitor (
34
) in which store (
30
) the processor TU data is stored temporarily before being clocked out at a retimed clock rate, wherein said retiming arrangement is characterised in that means (
32
) for generating the retimed clock signal (
31
), are provided, which means (
32
) includes three phase adjust inputs (&phgr;
1
, &phgr;
2
, &phgr;
3
) which are connected to the pointer processor (
25
), bit dejustifier (
28
) and store monitor (
34
) respectively whereby only the read bit justification data generated by the bit dejustifier (
28
) is used (on phase adjust input &phgr;
2
) to modify the recovered clock signal (
23
) and generate the retimed clock signal (
31
).
An embodiment of the invention will now be described by way of example with reference to the drawings in which;
REFERENCES:
patent: 5132970 (1992-07-01), Urbansky
patent: 5172376 (1992-12-01), Chopping et al.
patent: 5263056 (1993-11-01), Urbansky
patent: 5268936 (1993-12-01), Bernardy
patent: 5327430 (1994-07-01), Urbansky
patent: 5331641 (1994-07-01), Parruck et al.
patent: 5331671 (1994-07-01), Urbansky
patent: 5343476 (1994-08-01), Urbansky
patent: 5359605 (1994-10-01), Urbansky et al.
patent: 5361263 (1994-11-01), Urbansky
patent: 5384774 (1995-01-01), Martin et al.
patent: 5526359 (1996-06-01), Read et al.
patent: 5537447 (1996-07-01), Urbansky
patent: 5539750 (1996-07-01), Kivi-mannila et al.
patent: 5544172 (1996-08-01), Abbas
patent: 5563877 (1996-10-01), Van Tetering et al.
patent: 5579323 (1996-11-01), Krisher
patent: 5598445 (1997-01-01), Pinto et al.
patent: 5604773 (1997-02-01), Urala
patent: 5666351 (1997-09-01), Oksanen et al.
patent: 5774509 (1998-06-01), Frigerio et al.
patent: 5777998 (1998-07-01), Traverso et al.
patent: 5781597 (1998-07-01), Owen, III et al.
patent: 5802122 (1998-09-01), Niegel
patent: 5872780 (1999-02-01), Demiray et al.
patent: 0 522 748 A2 (1993-01-01), None
Synchrone Netze im richtigen Takt, 2323 Telcom Report (Siemens), 17 (1994) Mai/Juni, No. 3, Munchen, DE, pp. 118-121.
Kirschstein et al.
Marconi Communications Limited
Nguyen Chau
Trinh D.
LandOfFree
Retiming arrangement for SDH data transmission system does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Retiming arrangement for SDH data transmission system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Retiming arrangement for SDH data transmission system will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2435055