Reticle used for fabrication of semiconductor device

Radiation imagery chemistry: process – composition – or product th – Radiation modifying product or process of making – Radiation mask

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C430S394000

Reexamination Certificate

active

06368754

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a reticle and a method of fabricating a semiconductor device through the use of the reticle.
2. Description of the Related Art
Patterns having various sizes are selected in designing layout of LSI. Hence, a mask may have both a pattern for forming a contact hole defined in a minimum design rule, such as a 0.2 &mgr;m×0.2 &mgr;m square hole, and a pattern for forming a contact hole having a greater size, such as a 0.4 &mgr;m×0.4 &mgr;m square hole.
When patterns for forming contact holes having various sizes are transferred to a resist, a suitable amount of light to be radiated to a resist varies in dependence on a size of a pattern. If a first pattern for forming a first contact hole and a second pattern for forming a second contact hole having a greater size than a size of the first contact hole are both exposed to light in such exposure condition that the first contact hole has a designed dimension, the second contact hole would be formed in a greater size than designed. For instance, if a first pattern for forming a 0.2 &mgr;m×0.2 &mgr;m contact hole and a second pattern for forming a 0.4 &mgr;m×0.4 &mgr;m contact hole are both exposed to light in such exposure condition that the 0.2 &mgr;m×0.2 &mgr;m contact hole is properly formed, the 0.4 &mgr;m×0.4 &mgr;m contact hole would be formed in a size in the range of 0.5 &mgr;m×0.5 &mgr;m to 0.6 &mgr;m×0.6 &mgr;m.
As a result, a margin between gate electrodes and a margin between field oxide films are eliminated in a contact hole such as the above-mentioned 0.4 &mgr;m×0.4 &mgr;m contact hole. This causes a problem that a contact leak current is increased.
Hence, in a conventional method of fabricating a semiconductor device, there have been prepared two reticles in one of which a first mask is formed for patterning a contact hole having a first size, and in the other of which a second mask is formed for patterning a contact hole having a second size.
A conventional method of fabricating a semiconductor device through the use of a reticle is explained hereinbelow with reference to
FIGS. 1A
to
5
B.
First, as illustrated in
FIG. 1
, there are prepared a first reticle
22
having a first pattern
21
for forming first contact holes, and a second reticle
24
having a second pattern
23
for forming second contact holes having a smaller size than a size of the first contact holes.
Then, as illustrated in
FIG. 2A
, positive resist
26
is coated all over a wafer
25
.
Then, as illustrated in
FIG. 2B
, the first reticle
22
is aligned onto a pattern formed in the previous step. Then, the positive resist
26
is exposed to light, and thereafter, developed, as illustrated in FIG.
3
A. Thus, the first pattern
21
for forming the first contact holes is transferred onto the positive resist
26
.
Then, the wafer
25
is etched with the thus patterned positive resist
26
being used as a mask. Then, the positive resist
26
is removed. Thus, the first contact holes
27
are formed in the wafer
25
, as illustrated in FIG.
3
B.
Then, as illustrated in
FIG. 4A
, the positive resist is coated all over the wafer
25
again.
Then, as illustrated in
FIG. 4B
, the second reticle
24
is aligned onto the previously formed pattern. Then, the positive resist
26
is exposed to light, and thereafter, developed, as illustrated in FIG.
5
A. Thus, the second pattern
23
for forming the second contact holes is transferred onto the positive resist
26
.
Then, the wafer
25
is etched with the thus patterned positive resist
26
being used as a mask. Then, the positive resist
26
is removed. Thus, the second contact holes
28
having a smaller size than a size of the first contact holes
27
are formed in the wafer
25
, as illustrated in FIG.
5
B.
In the above-mentioned method, it seems that there may be carried out steps of aligning the first reticle
22
onto a pattern formed in the previous step, exposing the positive resist
26
to light, aligning the second reticle
24
onto the previously formed pattern without developing the positive resist
26
, and developing the positive resist
26
. However, this method would take much time from the first exposure till development of the positive resist
26
, which would generate variance in a dimension of the positive resist
26
. In particular, when a chemically amplifying resist is to be used, if it would take much time from exposure till development, there would be generated significant variance in a dimension of the resist.
In addition, when two reticles are to be used for forming contact holes having different sizes as in the above-mentioned conventional method, the number of steps for forming contact holes is two times greater than the number of steps for forming a single contact hole.
A mask used for forming a contact hole is generally aligned onto a pattern of gate polysilicon. In such alignment, there is generated misalignment both between a greater-sized contact hole and gate polysilicon and between a smaller-sized contact hole and gate polysilicon. Hence, when the greater-sized and smaller-sized contact holes are to be arranged in series, they have to be spaced away from each other by a distance including a margin corresponding to doubled misalignment. As a result, a resultant chip is unavoidable to become greater in size.
For instance, Japanese Unexamined Patent Publication No. 3-270134 has suggested a method of fabricating a semiconductor device through the use of two masks. Specifically, the suggested method includes the steps of coating photoresist onto an interlayer insulating film formed on a semiconductor substrate, exposing the photoresist to light through a first mask having a pattern for forming a first contact hole, developing the photoresist, exposing the photoresist to light through a second mask having a pattern for forming a second contact hole smaller in a diameter than the first contact hole, developing and baking the photoresist, etching the interlayer insulating film to thereby form the first and second contact holes, and forming a wiring electrode.
Japanese Patent Publication No. 5-87179 has suggested a method of making a pattern so as to form contact holes having various sizes. In accordance with the method, a mask for forming a greater-sized contact hole is designed to have a hole smaller than a designed size, taking into consideration a difference in size to be generated when a pattern is formed.
SUMMARY OF THE INVENTION
In view of the above-mentioned problems, it is an object of the present invention to provide a reticle which is capable of transferring a contact hole to a resist just in a designed dimension regardless of a size thereof.
In one aspect of the present invention, there is provided a reticle used for fabrication of a semiconductor device, including (a) a first area in which a first mask having a first pattern is formed for forming a first contact hole having a first size, and (b) a second area in which a second mask having a second pattern is formed for forming a second contact hole having a second size different from the first size.
It is preferable that the first pattern has a greater density than a density of the second pattern. Herein, a density is defined as a ratio of a total area of the first or second pattern to an area of the first or second mask.
There is further provided a reticle used for fabrication of a semiconductor device, including (a) a first area in which a first mask is formed for forming a first linear pattern having a first size, and (b) a second area in which a second mask is formed for forming a second linear pattern having a second size different from the first size.
The first size may be equal to the second size, or different from said second size. In the latter case, it is preferable that the first linear pattern has a greater density than a density of the second linear pattern.
There is still further provided a reticle used for fabrication of a semiconductor device, including N areas in each

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Reticle used for fabrication of semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Reticle used for fabrication of semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Reticle used for fabrication of semiconductor device will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2906655

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.