Retention means for chip carrier sockets

Details Retention means for chip carrier sockets Retention means for chip carrier sockets

1988-05-06

1989-10-10

Abrams, Neil

Electrical connectors

Preformed panel circuit arrangement, e.g., pcb, icm, dip,...

With provision to conduct electricity from panel circuit to...

439330, 439526, H01R 2372

Patent

active

048728454

ABSTRACT:
Chip carrier sockets (2) have terminals (4) provided therein, the terminals (4) comprising leg portions (34) with first resilient arms (18) and second resilient arms (20) pivotally attached thereto. The first resilient arms (18) have contact surfaces (26) provided on free end sections (22) thereof. The contact surfaces (26) are provided to electrically engage leads (6) of the chip carrier (8). A cover (12) is provided to cooperate with the chip carrier and to act as a protective handler for the chip carrier. Retention means are positioned on the chip carrier socket (2) to cooperate with the cover (12), thereby providing the contact force required to insure that a positive electrical connection is effected between the leads (6) and the terminals (4). The resilient configuration of the retention means insures that the retention means will not fail under normal stresses associated therewith.

REFERENCES:
patent: 3179738 (1965-04-01), De Lyon
patent: 3399374 (1968-08-01), Pauza
patent: 3905665 (1975-09-01), Lynch
patent: 3951495 (1976-04-01), Donaher et al.
patent: 4349238 (1982-09-01), Showman et al.
patent: 4547031 (1985-10-01), Korsunsky
patent: 4623208 (1986-11-01), Kerul et al.
patent: 4752248 (1988-06-01), Rudy

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