RESURF EDMOS transistor and high-voltage analog multiplexer circ

Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Parallel controlled paths

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Details

327404, 327407, 327408, 327 99, H03K 501, G06F 300

Patent

active

058545662

ABSTRACT:
A bi-directional high-voltage RESURF EDMOS (REduced SURface Extended Drain MOS) transistor which can endure a high voltage at its source by providing drift regions at both sides, i.e., the source and drain of the conventional RESURF LDMOS (Lateral DMOS) transistor, and exchanging the drain and the source when an analog signal of high voltage is inputted. Further, the bi-directional high-voltage RESURF EDMOS transistor provides a high-voltage analog multiplexer circuit employing a RESURF EDMOS transistor which is capable of reducing the number of necessary high-voltage elements and performing a stable operation, by constructing a high-voltage analog multiplexer having at least three inputs and a multistage high-voltage multiplexer circuit of push-pull type, pass transistor type, and combined form of push-pull type and pass transistor type by using the bi-directional high-voltage RESURF EDMOS transistor. Additionally, in the case where a multistage high-voltage multiplexer such as for an LSI for driving a display is necessary, a high-voltage multiplexer is realized, whereby the LSI chip size is reduced in accordance with reduction of the number of high voltage elements and the chip resistance value for the LSI chip can be reduced.

REFERENCES:
patent: 5070255 (1991-12-01), Shin
patent: 5162666 (1992-11-01), Tran
patent: 5323044 (1994-06-01), Rumennik et al.
patent: 5430403 (1995-07-01), Moyer et al.

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