Patent
1997-02-18
1999-02-16
Pan, Daniel H.
395712, 395678, 395569, G06F 942, G06F 922
Patent
active
058729631
ABSTRACT:
A system and method for context switching between a first and a second execution entity (such as a thread) without having to enter into protected kernel mode. The system includes a memory and a plurality of processors, wherein each of the plurality of processors operates within both a user mode and a protected kernel mode and includes a program counter and a plurality N of registers. The first and second execution entities have user states defined by a program counter value, a context identifier value and N register values. To switch context, an execution entity such as a thread, while in user mode, writes the user state of the first execution entity to memory. It then restores the user state of the second execution entity by writing register values associated with the second execution entity to all but a first register and writing the context identifier value to a context identifier location. The program counter value is then written to the first register and a jump performed to the program counter value stored in the first register while the last remaining register value is loaded to the first register. Each of these steps is performed in user mode; the result is an efficient way of switching from one user thread to the next user thread without entry into kernel space.
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Ananthanarayanan Rajagopal
Bitar Nawaf K.
Craig David
English Robert M.
Petruncola Alexander D.
Pan Daniel H.
Silicon Graphics Inc.
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