Electrical computers and digital processing systems: processing – Processing architecture – Long instruction word
Patent
1997-11-19
2000-05-16
Kim, Kenneth S.
Electrical computers and digital processing systems: processing
Processing architecture
Long instruction word
712227, 714 30, G06F 1126
Patent
active
060651067
ABSTRACT:
A data processing system on an integrated circuit 42 with microprocessor 1 and peripheral devices 60-61 is provided with an emulation unit 50 which allows debugging and emulation of integrated circuit 42 when connected to an external test system 51. Microprocessor 1 has in instruction execution pipeline which has several execution phases which involve fetch/decode units 10a-c and functional execution units 12, 14, 16 and 18. The pipeline of microprocessor 1 is unprotected so that memory access latency to data memory 22 and register file 20 can be utilized by system program code which is stored in instruction memory 23. Emulation unit 50 provides means for emulating the unprotected pipeline of microprocessor 1 and for rapidly uploading and downloading memories 22-23. During emulation, the fetching of instructions from program memory can be halted. A packet of instructions can be transferred from the emulation unit to the instruction register of the processor via a test port and executed without fetching instructions from instruction memory. The packet of instructions can perform various tasks, such as loading or storing data or loading new instructions into program memory. Emulation unit 50 operates in a manner to prevent extraneous operations from occurring which could otherwise affect memories 22-23 or peripheral devices 60-61 during emulation.
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Deao Douglas E.
Seshan Natarajan
Donaldson Richard L.
Kim Kenneth S.
Laws Gerald E.
Marshall, Jr. Robert D.
Texas Instruments Incorporated
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