Data processing: structural design – modeling – simulation – and em – Modeling by mathematical expression
Reexamination Certificate
2005-12-21
2009-12-01
Phan, Thai (Department: 2128)
Data processing: structural design, modeling, simulation, and em
Modeling by mathematical expression
C703S026000, C703S027000, C712S037000, C712S223000, C716S030000
Reexamination Certificate
active
07627458
ABSTRACT:
A method is provided to automatically allocate resources of an integrated circuit (IC) to form multipliers in a given design to optimize the use of IC resources. Information about the multipliers in the design is extracted to place the multipliers into a priority order. The priority allows primitives in the IC, like DSP blocks LUTs or MUXCYs to be economically allocated to the multipliers. The ordering criteria can include: (1) a user defined criteria, (2) the number of primitives required to implement a multiplier, or (3) a size of the multiplier operands. This invention further optimally allocates LUTs and MUXCYs when DSP48 blocks are exhausted. The steps for generating a multiplier include: constructing a partial product matrix and minimizing the adders used in the multiplier by minimizing the size of support for the partial products. Either LUTs or MUXCYs are selected depending on the size of support determined.
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Rjimati Yassine
Van Mau David Nguyen
George Thomas
Phan Thai
Ward Thomas A.
XILINX Inc.
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