Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction
Patent
1998-10-20
2000-01-18
Crane, Sara
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Heterojunction
257 30, 257 37, H01L 2906
Patent
active
060159782
ABSTRACT:
The method for forming a semiconductor microstructure of this invention includes the steps of: forming a mask pattern having a first opening and a second opening on a substrate having a semiconductor layer as an upper portion thereof; and selectively etching the semiconductor layer using the mask pattern to form a semiconductor microstructure extending in a first direction parallel to a surface of the substrate, wherein, in the step of selectively etching the semiconductor layer, an etching rate in a second direction vertical to the first direction and parallel to the surface of the substrate is substantially zero with respect to an etching rate in the first direction, and a width of the semiconductor microstructure is substantially equal to a shortest distance between the first opening and the second opening in the second direction.
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K. Kurihara et al., "Sub-10-nm Si Lines Fabricated Using Shifted Mask Patterns Controlled with Electron Beam Lithography and KOH Anisotropic Etching", Jpn J. Appl. Phys., vol. 35, Part 1, No. 12B, Dec., 1996, pp. 6668-6672.
K. Kurihara et al., "Sub-10-NM Si Lines Fabricated Using Shifted Mask Patterns Controlled with Electron Beam Lithography and KOH Anisotropic Etching", Microprocess, pp. 212-213, Jul. 11, 1996.
Hirai Yoshihiko
Morimoto Kiyoshi
Morita Kiyoyuki
Yuki Koichiro
Crane Sara
Matsushita Electric - Industrial Co., Ltd.
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