Data processing: measuring – calibrating – or testing – Measurement system – Measured signal processing
Reexamination Certificate
1999-07-12
2002-05-14
Hoff, Marc S. (Department: 2857)
Data processing: measuring, calibrating, or testing
Measurement system
Measured signal processing
C347S116000
Reexamination Certificate
active
06389373
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a resolver signal processing system that executes processing such as, for example, to measure the angle of rotation of a rotator, based on the resolver output signals.
2. Description of the Related Art
Resolvers are known that detect an angle of rotation of a rotator's rotor. The measured results are typically used for servo control of the rotator.
FIG. 1
shows a functional block diagram that schematizes a predecessor servo control system using the resolver, implemented by prior art. The resolver
2
outputs signals produced by modulating the amplitude of reference signal supplied from a sine-wave oscillator
4
, dependent on the angle of rotor rotation. The resolver
2
and a motor
6
are configured to share a same shaft on which they both rotate, so that the angle of rotation of the rotor of the motor
6
can be detected based on the resolver output signals.
The measurement of an angle of rotation is conventionally performed using a circuit commonly called a-resolver/digital (R/D) converter. To the primary winding of the resolver, a reference signal, sine wave E
1
·sin &ohgr;t (E
1
represents the amplitude of the reference signal) is input. The outputs are V
sin
and V
cos
voltages that are produced at the ends of two secondary windings positioned apart from each other by 90 degrees of phase difference. The V
sin
and V
cos
resolver output signals are respectively equal to modulated signals E
2
·sin (&ohgr;t+&agr;) sin &thgr; and E
2
·sin (&ohgr;t+&agr;) cos &thgr; which are produced by modulating the reference signal, depending on the angle of rotor rotation &thgr;. (E
2
is the amplitude of the modulated signals, &agr; is the phase shift of the modulated signals from the reference signal, and E
2
/E
1
is the ratio of transformer for the modulated signals to the reference signal.) After amplified by differential amplifiers
8
and
10
respectively, these signals are input to an R/D converter
12
and an analog-digital (A/D) converter
14
. The R/D converter
12
carries out a Phase Locked Loop (PLL) control process in the following manner: The R/D converter
12
calculates a value of sin (&thgr;−&phgr;) from sin &phgr; and cos &phgr; signals relative to the reference angle of rotation &phgr;, which are, for example, controlled by a voltage control oscillator, and the V
sin
and V
cos
resolver output signals including the angle of rotor rotation &thgr;; and increments or decrements a value of count corresponding to &phgr; so that the phase difference (&thgr;−&phgr;) will be 0. Thus, the R/D converter
12
detects and outputs a value of &phgr; as the value of the angle of rotor rotation &thgr; when the PLL control is convergent, that is (&thgr;−&phgr;)=0.
A central processing unit (CPU)
16
, operating according to the clock, to which the angle of rotation &thgr; and other data are input from the R/D converter
12
and the result of conversion and associated data are input from the A/D converter
14
, executes the processing for servo control of the motor
6
and fault detection for the resolver
2
. For example, the CPU
16
generates PWM pulses to drive the motor
6
, based on the clock. Current values of I
U
and I
V
corresponding to two phases of a three-phase signal for driving the motor
6
are converted into digital values through the A/D converter
14
and fed back to a control loop processing section
22
of the CPU. Using the result of feedback, the control loop processing section
22
executes servo control loop processing to set the voltages in the U, V, and W phases which are output as PWM voltage requirements.
For fault detection, for example, at a point where the amplitude of the V
sin
and V
cos
resolver output signals reaches the maximum, the CPU
16
calculates the square sum of these signals (V
sin
2
+V
cos
2
) The phase difference between the peak amplitude point of the V
sin
and V
cos
resolver output signals and the peak amplitude point of the reference signal is constant. An interrupt signal generator section for resolver amplitude check
24
detects the timing of the peak amplitude of the resolver output signals, based on the result of detection of the peak amplitude of the reference signal output from the sine-wave oscillator
4
. When a faulty timing is detected, the interrupt signal generator section
24
issues a signal for interrupting the servo control loop executed by the control loop processing section
22
within the CPU
16
, causing the CPU
16
to halt the servo control loop and execute the processing for fault detection.
FIG. 2
shows a flowchart for outlining the conventionally applied servo control processing. When the servo control processing starts, the A/D converter is activated (step S
50
) to execute the A/D conversion of, for example, I
U
and I
V
. The control loop processing section
22
obtains the resolver data which has been output from the R/D converter
12
(step S
55
) and computes an electrical angle &thgr;
e
(step S
60
), while receiving the A/D converted I
U
and I
V
data (step S
65
). In order to facilitate the control of the motor, coordinate transformation is performed. Thus, the I
U
and I
V
data are transformed into magnetized current Id and torque current Iq, respectively (step S
70
). The control loop processing section
22
Computes a d-axis voltage requirement and a q-axis voltage requirement, based on the values of Id and Iq (steps
375
and S
80
). The voltage requirements for d and q axes thus calculated are transformed into three phase coordinates of U, V, and W phases (step S
85
) Based on the result of this transformation, PWM voltage requirements are generated (step
90
). According to the PWM voltage requirements, a triangular wave comparator section
26
generates PWM pulses to drive a driver
28
, and the correspondingly generated I
U
, I
V
, and I
W
currents are supplied to the motor
6
.
FIG. 3
shows a flowchart outlining example conventionally applied resolver fault
ormal judgment processing. The interrupt signal generator section for resolver amplitude check
24
consists of a comparator that holds a preset threshold for the reference signal peak level and generates an interrupt signal at a timing when the reference signal value exceeds the threshold. In synchronization of this interrupt signal, the fault
ormal judgment processing is activated. The A/D converter
14
is then activated (step S
100
) and the V
sin
and V
cos
resolver output signals are acquired by the control loop processing section
22
(step S
105
) . The acquired signals nearly correspond to the peak point of the reference signal (sin &ohgr;t=±1) and their values are ±E
2
·sin &thgr; and ±E
2
·cos &thgr;, respectively. Hence, principally, the square sum (V
sin
2
+V
cos
2
) must become E
2
. The square sumof these signals is calculated (stepS
110
) According to whether the resultant square sum exceeds the threshold which has typically been set near E
2
, the fault
ormal judgment is carried out. If the judgment indicates a fault, fault corrective action is executed (S
120
).
In the conventional implementation of such system, the resolver output signals are sampled for fault
ormal judgment, based on the reference signal generated by the sine-wave oscillator
4
, whereas the servo control processing for the motor is carried out in synchronization with the output from the CPU's time base section
20
and this output is based on the clock. In this way, the fault
ormal judgment and the servo control are based on different signals which are supplied independently; i.e., the output from the sine-wave oscillator
4
and the clock. Consequently, the resolver output signal sampling timing is asynchronous with the servo control cycle and an interrupt for this sampling may occur during the control loop. Unless the resolver output signal sampling is carried out on a real-time basis in synchronization with the peak point of the reference signal, the accurac
Hoff Marc S.
Oliff & Berridg,e PLC
Pretlow Demetrius R.
Toyota Jidosha & Kabushiki Kaisha
LandOfFree
Resolver signal processing system does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Resolver signal processing system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Resolver signal processing system will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2863285