Amplifiers – With semiconductor amplifying device – Including gain control means
Patent
1991-12-31
1993-01-19
Dzierzynski, Paul M.
Amplifiers
With semiconductor amplifying device
Including gain control means
330 86, 3072968, H03G 312
Patent
active
051809885
ABSTRACT:
A MOS voltage trim amplifier which can multiply an input voltage with a quantized value to generate an output voltage. The MOS trim amplifier comprises a MOS op-amp, a multiplying feedback network, a gate-bias network and startup circuit. The MOS op-amp has a noninverting terminal for receiving the input and an inverting terminal for receiving the feedback network. The multiplying feed back network uses two MOSFETs as feedback elements to provide the voltage ratio for the multiplication. The gate-bias network provides a reference voltage which is a fraction of the input voltage through a MOSFET voltage divider to the feedback MOSFETs. Current mirrors are employed in the gate-bias network to provide a constant stable current through the MOSFET voltage divider to avoid loading the input. The startup circuit generates a bias current to the two feedback MOSFETs to drive them out of their natural off state.
REFERENCES:
patent: 4100437 (1978-07-01), Hoff
patent: 4451795 (1984-05-01), Kilian
patent: 4500845 (1985-02-01), Ehni
patent: 4994688 (1991-02-01), Horiguchi et al.
Dinh Tan
Dzierzynski Paul M.
Intel Corporation
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