Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion
Reexamination Certificate
1999-01-14
2001-06-26
Wamsley, Patrick (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Digital to analog conversion
C341S145000
Reexamination Certificate
active
06252534
ABSTRACT:
FIELD OF THE INVENTION
The present invention is related generally to the field of digital-to-analog converters (DACs) and, more particularly, to a string DAC having current mode interpolation enabling a reduction in number of taps for a set number of bits.
BACKGROUND
DACs and analog-to-digital converters (ADCs) have come recently into more widespread use. This is due in part to improvements in process and implementation technologies as well as an increase in applications for such converters. Applications include use in multimedia, audio, video and computer peripheral products, for examples.
One common type of DAC is the so-called “string DAC”. A typical N-bit string DAC, used for converting an N-bit digital word to an analog voltage, includes 2
N
taps to a resistor ladder. The resistor ladder includes 2
N
resistors connected in series between positive and negative supply voltages. The taps to the resistor ladder are connected through switches to an output of the DAC. Each adjacent set of taps is separated by a different one of the resistors within the ladder.
During operation, the N-bit digital word controls the switches such that one and only one of the switches closes connecting one of the taps to the DAC output. The voltage appearing at that tap is provided as an output of the DAC. As will be understood, the resistor ladder acts as a large voltage divider with each tap of the ladder being at a different voltage value. The tap selected for connection to the output depends on the digital word input to the DAC. Typically, the digital input word is decoded for controlling the switches to close one. Often, as the digital input word increases, so does the analog output voltage.
String DACs are fairly simple to implement and are inherently monotonic. String DACs are used commonly for particular applications. For example, string DACs often are used to provide reference voltage output taps in flash ADCs. Similarly, string DACs are used in applications where rail-to-rail outputs are required and a load need not be driven.
One drawback associated with string DACs is their size requirement. Typically, for an N-bit string DAC, 2
N
taps (and resistors) are required. For a significant number of bits, i.e.,bits and greater, the size can become a significant factor, particularly where large resistors are required for realizing small resistances.
SUMMARY OF THE INVENTION
Applicants have discovered a circuit and method which enables an N-bit DAC to be realized with a number of taps less than 2
N
taps. In one embodiment, an N-bit DAC can be realized with 2
N/2
taps.
One embodiment of the invention is directed to an N-bit DAC that converts an N-bit digital word to an analog voltage. The N-bit DAC includes a N-bit modified string DAC, including no more than 2
n
taps, that receives as an input, n most significant bits (MSBs) of the N-bit digital word. The N-bit DAC also includes an m-bit interpolating DAC, coupled to the n-bit modified string DAC, that receives as an input, m least significant bits (LSBs) of the N-bit digital word, and provides an analog output to the N-bit modified string DAC.
In an embodiment, n+m=N.
In an embodiment, n=m=N/2.
In an embodiment, n=5, m=5 and N=10.
In an embodiment, the interpolating DAC includes a plurality of current DACs, wherein each current DAC provides current to or from the N-bit modified string DAC.
In an embodiment, the plurality of current DACs includes first and second current DACs.
In an embodiment, the level of current produced by each current DAC depends on the m LSBs.
In an embodiment, the sum of the currents produced by the first and second current DACs is approximately equal to the current that flows in the n-bit modified string DAC.
In an embodiment, for certain values of the MSBs of the N-bit digital word, the current provided to or from the modified string DAC by each current DAC is redirected through certain resistors of the modified string DAC.
In an embodiment, the certain values of the MSBs include zero and full-scale and the certain resistors include end resistors connected to the plurality of resistors in the modified string DAC.
Another embodiment of the invention is directed to a method for converting an N-bit digital word to an analog voltage comprising the steps of:
providing an N-bit modified string DAC, that includes no more than 2
n
taps, the n-bit modified string DAC receiving as an input, n MSBs of the N-bit digital word, and providing the analog voltage as an output; and
based on m LSBs of the digital word, increasing or decreasing a voltage level at each tap of the N-bit modified string DAC;
wherein n+m=N.
In an embodiment, the step of increasing or decreasing includes the step of using an m-bit interpolating DAC to increase or decrease a voltage level at each tap of the n-bit modified string DAC.
In an embodiment, the step of using an interpolating DAC includes using a plurality of current DACs, each current DAC providing current to or from the n-bit modified string DAC.
In an embodiment, the level of current output by each current DAC depends on the m LSBs of the N-bit digital word.
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patent: 4885581 (1989-12-01), Sugawara et al.
patent: 4918448 (1990-04-01), Hauviller et al.
patent: 5627537 (1997-05-01), Quinlan et al.
patent: 5703588 (1997-12-01), Rivoir et al.
patent: 5808576 (1998-09-01), Chloupek et al.
patent: 5940020 (1999-08-01), Ho
Nicholas van Bavel, “A 325 MHz 3.3V 10-Bit CMOS D/A Converter . . . ,” IEEE, 245-248, May 1998.*
Nicholas van Bavel, “A 325 MHz 3.3V 10-Bit CMOS D/A Converter . . . ,” IEEE, 245-248, May 1998.
Analog Devices Inc.
Wamsley Patrick
Wolf Greenfield & Sacks P.C.
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