Resistor cascade for forming electrical reference quantities...

Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion

Reexamination Certificate

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C341S154000, C341S155000, C338S205000, C338S228000

Reexamination Certificate

active

06466152

ABSTRACT:

The invention relates to a resistor cascade for forming electrical reference quantities and also to an analog/digital converter.
Such a resistor cascade and such an analog/digital converter are disclosed in [1].
In various circuitry applications, in particular in analog circuits, it is necessary to provide electrical reference quantities in a form that is stepped as exactly as possible.
Thus, it is known, for example, to operate a resistor cascade having N identical electrical resistors R and a reference voltage V
ref
in such a way that, at the taps between two respective electrical resistors, the electrical voltages of the series circuit of electrical resistors are provided in accordance with the following specification:
V

(
n
)
=
V
ref
·
n
N
,


where



1

n

N
(
1
)
A resistor cascade of this type is used for example in a so-called flash analog/digital converter.
In this case, the analog input signal is compared, with the aid of comparators, with the different voltages in accordance with specification (1).
In this case, a logic high signal is produced at the outputs of the comparators at whose inputs the analog input signal is greater than the value V(n), but a logic low signal is produced at the outputs of all the other comparators.
The output signals of the comparators are logically combined with one another in a logic circuit connected to the comparators, which circuit is designated as evaluation logic unit hereinafter, and are converted into a logic output signal in the respectively desired logic representation.
The maximum accuracy that can be achieved by such an analog/digital converter depends to a considerable extent on the accuracy and the parameter variations of the components used, in particular the resistors used in the resistor cascade.
The reference voltage V
ref
can be provided by means of so-called bandgap circuits. In the majority of cases, these circuits achieve such a high accuracy that variations in the reference voltage V
ref
are only of secondary importance with regard to the accuracy of the entire analog/digital converter.
Moreover, there are circuit variants and application variants in which this reference voltage V
ref
is provided or adjusted externally.
However, a critical quantity for the comparators is their input offset voltage.
In the case of a CMOS comparator, in particular, said voltage is essentially determined by the threshold voltage mismatch of the input transistors of the comparator.
The threshold voltage mismatch can be reduced by enlarging the area of said transistors, in accordance with the laws described in [1] and [2], this measure having only limited suitability on account of the available area for the individual electrical components in the comparator, and for other reasons as well.
A further possibility is to use so-called auto-zeroing circuits. In such an auto-zeroing circuit, the input offset of a given offset-manifesting circuit is measured at periodic time intervals and a buffer-storing of this value is applied and, during active operation of the actual offset-manifesting circuit, these buffer-stored values are subtracted again from the differential signal in order to compensate the input offset voltage.
Moreover, a further significant cause of the inaccuracy of an analog/digital converter resides in local and long-range parameter variations of the resistor cascade.
So-called local variations, which are also referred to as near field mismatch, result from statistical processes during the production of the electrical resistors of the resistor cascade and are unavoidable on account of fundamental physical basic laws.
In the case of electrical resistors made of polycrystalline silicon, the value of the electrical resistance varies for example proportionally to the reciprocal of the root of the average number of grains of the polycrystalline silicon of an electrical resistor having a given area, as described in [3].
In this case, too, enlarging the area reduces the parameter variation but inevitably leads to an increased area requirement on a chip, that is to say to a considerable spatial extent of the resulting resistor cascade.
However, since a resistor cascade cannot, in principle, be concentrated in a confined space, long-range effects such as the line width fluctuations, for example, lead to gradients in the values of the electrical resistors, as described in [4].
Thus, whereas enlarging the area leads to an improvement in the matching behavior of adjacent electronic components, long-range gradients, influenced by this measure, may perfectly well increase in the negative sense in the context of mismatch.
Furthermore, parameter variations in the electrical resistors can also be attributed
to the inaccuracy during the doping of the individual components,
to the inhomogeneous distribution of the electrical charge carriers, which can be attributed, in particular, to defects in the crystal lattices of the materials used, and also
to inaccuracies in the context of the production processes, in particular during the photolithography.
Furthermore, principles of carbon nanotubes are disclosed in [5].
Furthermore, a production method for carbon nanotubes is disclosed in [6].
Moreover, it is known from [7] that the electrical resistance of a single-walled carbon nanotube is given by the so-called Klitzing resistance, which is approximately 26.5 &OHgr; and is independent of the length and the diameter of the carbon nanotube.
[8] describes a method in which carbon nanotubes are deposited by means of self-aligned deposition between two contact areas.
[9] describes a reference voltage generator for an A/D converter or a D/A converter in which, in a voltage adjusting circuit, implemented as a resistor cascade, isolating devices are provided between individual resistors.
Furthermore, [10] discloses a further resistor chain constructed from electrical nonreactive resistors and transistors.
The invention is based on the problem of specifying a resistor cascade and also an analog/digital converter with which, in particular, the parameter variations of the electrical resistors are reduced.
The problem is solved by means of the resistor cascade and also by means of the analog/digital converter having the features in accordance with the independent patent claims.
A resistor cascade for forming electrical reference quantities from a reference voltage, which is preferably provided by a reference voltage source, has a plurality of electrical resistors which are coupled to one another in series. Each electrical resistor is formed by at least one carbon nanotube.
As described above, such a carbon nanotube has a value of its electrical resistance of 26.5 &OHgr;, said value being essentially independent of its length and its diameter.
Consequently, disregarding the contact resistances which enable electrical coupling between the individual nanotubes, a resistor cascade is specified independently of the length and the diameter of the single-walled carbon nanotubes, which resistor cascade provides a very accurate resistor cascade which is essentially independent of the production conditions, is very robust and accurate and has very accurately identical individual electrical resistors, the carbon nanotubes.
In order to provide an electrical resistor having a value which differs from 26.5 &OHgr;, it is possible, in order to provide this desired resistance, for an electrical resistor to be formed by a parallel circuit and/or a series circuit comprising a plurality of nanotubes, for example single-walled carbon nanotubes.
An analog/digital converter has a resistor cascade with a plurality of carbon nanotubes and also a number of comparators corresponding to the number of electrical resistors. The resistor cascade, i.e., in particular, a respective tap between two respective resistors of the resistor cascade, is in each case coupled to a first input of a comparator, with the result that, depending on

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