Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
1998-11-30
2001-06-19
Paladini, Albert W. (Department: 2831)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S255000, C029S846000, C428S209000, C428S901000
Reexamination Certificate
active
06248958
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention relates generally to the production of Copper-Invar™-Copper (hereinafter “CIC”) material, used in High Performance Chip Carriers (hereinafter “HPCC”), and more particularly, to CIC material having improved resistivity control following high temperature exposures.
2. Related Art
Laminate chip carriers demonstrate the potential of providing the semiconductor industry with high performance, low cost first level packaging. However, packaging assemblies that utilize laminate chip carriers may have poor reliability, due to the mismatch of the Coefficient of Thermal Expansion (hereinafter CTE) between the silicon chips and the first level packaging. If the CTE of the first level package closely matches the CTE of the silicon chip (approximately 3 ppm/° C.), minimal stresses are induced at the interface of these layers. However, the stresses at the interface of the first level and second level may be high, thereby yielding a less reliable package. If the CTE of the first level package matches the CTE of the second level package (approximately 18 ppm/° C.), the stresses will be concentrated at the interface of the silicon chip and the first level carrier. A laminate package containing CIC may be used which has an intermediate CTE (approximately 12 ppm/° C.), which yields an assembly with more balanced stresses and improved reliability. The beneficial effects of the CIC are attributable to the low CTE of the INVAR™, an alloy containing approximately 63.8% iron, 36% nickel and 0.2% carbon.
Although the theoretical electrical conductivity of copper layers in thin CIC is sufficient for use in laminate packaging, CIC has been observed to exhibit reduced conductivity after high temperature processing. This is believed to be caused by the diffusion of nickel, originating from the INVAR™, into the copper layers during heat cycles.
Currently, CIC materials are manufactured using a cladding process in which copper is bonded to the INVAR™ surface at their desired final thickness ratios. The CIC substrate is then rolled, under controlled temperature and pressure, to achieve the final desired thickness. Although this method produces well bonded materials with controlled material ratios, it is time consuming and requires the use of extreme pressures and temperatures, which contribute to the internal stresses within the material. These additional stresses may subsequently be removed by heat treatment procedures, which in turn increase the resistivity of the CIC due to the diffusion of nickel into the copper.
Therefore, there exists a need to develop a laminant chip carrier containing CIC which maintains the electrical conductivity of the constituent copper. Currently, there exists no technique designed to reduce the stresses within the CIC material without increasing the resistivity of the copper.
SUMMARY OF THE INVENTION
The present invention provides a printed circuit board and a method of producing a printed circuit board which overcomes the above-identified problems associated with the use of CIC material in the production of HPCC products.
A first general aspect of the present invention provides a printed circuit board having a diffusion barrier layer between layers of CIC material. The diffusion barrier layer, made of sputtered chromium, remains throughout processing. The diffusion barrier prevents the migration of nickel, originating from the INVAR™, into the surrounding copper layers thereby preventing an increase in resistivity of the CIC material.
A second general aspect of the present invention provides a printed circuit board including a diffusion barrier between a conductive core and a conductive layer. This aspect provides similar advantages to that of the first aspect, and further allows for the use of a similar diffusion barrier layer between conductive materials other than CIC.
A third general aspect of the present invention provides a method of forming a printed circuit board including the steps of providing a conductive core; patterning the conductive core; depositing a diffusion barrier layer thereon; depositing a conductive layer thereon; and applying a non-conductive layer. This aspect of the process allows for a method of forming a printed circuit board containing a diffusion barrier layer therein, and provides similar advantages referred to in the first aspect.
It is therefore an advantage of the present invention to provide a micro thin chromium diffusion barrier between layers of the CIC material, which remains throughout processing, to prevent the migration of nickel into the copper and thereby improve resistivity and maintain the mechanical and electrical properties of the material.
It is therefore a further advantage of the present invention to provide a manner of reducing the stresses within the CIC without increasing resistivity.
It is a further advantage of the present invention to start with a layer of INVAR™, at its final desired thickness, and sputter deposit layers of chromium and copper such that the CIC formed is of the desired final thickness, thereby eliminating the need for subsequent rolling processes.
The foregoing and other features and advantages of the invention will be apparent from the following more particular description of preferred embodiments of the invention.
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McClure Bonnie S.
Stone David B.
Fraley Lawrence R.
International Business Machines - Corporation
Paladini Albert W.
Schmeiser Olsen & Watts
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