Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate
2001-12-20
2004-05-18
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
C257S528000, C257S537000, C257S758000, C257S773000, C257S776000, C257S767000, C257S690000, C257S700000, C257S664000
Reexamination Certificate
active
06737749
ABSTRACT:
BACKGROUND OF THE INVENTION
Circuit package designs are utilizing higher operational frequencies to satisfy data rate increases of integrated circuits. As a result, package designs must address challenges to signal propagation presented by the increased operational frequencies that were previously ignored, such as distributed resistance and capacitance (RC) of the conductor, an impedance of the driving source and load impedance. Specifically, for very long conductors, i.e., conductors whose length is great compared to the wavelength of a signal, the RC of the conductor produces propagation delays, as well as contributes to impedance mismatches. Impedance mismatch between the driving source and the conductor results in signal reflection, which interferes with signals produced by the driving circuit, typically referred to as return loss. Return loss results in both noise and shape degradation in signals produced by the driving circuit.
To avoid impedance mismatch, packages may be designed with discrete resistors to define the impedances of the signal lines connected to the driving receiving circuit. Typically, these discrete resistors are formed by printing, such as screen printing, a thick-film resistive paste or ink on a substrate and are referred to as thick-film resistors. The predictability and variability (or tolerance) of the electrical resistance of a thick-film resistor has proved challenging.
As a result, circuit package design typically has depended upon integrated circuit design to solve the problems presented by high frequency signal propagation. For example, U.S. Pat. No. 6,115,298 to Kwon et al. discloses a semiconductor device that includes a circuit to reduce impedance mismatch between the semiconductor device and a bus connected thereto. The bus consists of a plurality of signal lines. The semiconductor device includes a discrete resistor, corresponding to the impedance of the signal lines. The signal lines are connected to a plurality of second pads. A reference voltage generator generates a reference voltage. A comparator compares a voltage on the first pad with the reference voltage, generating a control signal in response to the comparison. A code generator generates a code signal in accordance with the control signal to produce a current on the first pad. A data driver drives data signals to the code signal, thereby matching the impedance of the data driver with the impedance of the signal lines.
U.S. Pat. No. 5,808,478 to Andresen discloses a buffer with a slew rate that is load independent. The buffer is comprised of an output buffer connected to an output terminal. The output buffer is controlled such that it can drive a load with different drive levels by changing the transconductance internal thereto. The transition on the input to the buffer is passed through an intrinsic delay block to provide a delay signal on a node. A first phase detector latch with a first threshold voltage compares this transition with the transition on the output terminal. A second phase detector latch with a second threshold voltage, also compares this delayed transition with that on the output terminal. If both of the latches indicate that the delayed transition occurred after the transition on the output terminal, a control signal on a line is changed by incrementing a counter. This will change the drive to a load. If the transition on the output terminal occurs after the delayed transition, then the counter increments the count value in the opposite direction, increasing the drive to the load to increase the speed of the output driver.
What is needed, however, is a circuit package design that minimizes impedance mismatch between the driving source and the conductor.
SUMMARY OF THE INVENTION
Provided is a circuit package and a method of forming the same that facilitates control of the impedance of a driving circuit employing resistive vias formed into a dielectric substrate. In this manner, the input impedance, output impedance or both of the driving circuit may more closely match the impedance of the conductor, or transmission line, of a package that is connected thereto. To that end, the package includes a dielectric substrate having a first surface and a second surface, disposed opposite to the first surface. A via extends between the first and second surface, and a first conductor is disposed on the surface that extends from the via. A second conductor is disposed on the second surface and extends from the via. The via has a resistive fill disposed therein, defining a resistance connected between the first and second conductors. A driver circuit is mounted to the substrate and includes an input and an output. The output is in electrical communication with the first conductor and has an output impedance associated therewith. The output impedance includes an output resistive component and an output reactance component. The output resistive component including the resistance, and the resistance is of sufficient magnitude to be the dominant component of the output impedance. In another embodiment, the impedance of the input is controlled in a similar fashion. The method defines steps to make the aforementioned circuit.
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The Effects of Vias on PCB Traces, Design Note, UltraCAD Design, Inc., 1994.
Liebermensch Avi
Tomsio Nayon
Flynn Nathan J.
Mandala Jr. Victor A.
Sun Microsystems Inc.
Zagorin O'Brien & Graham LLP
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