Resistive gate field effect transistor logic family

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307448, 307473, 307304, 357 2314, H03K 19094, H03K 1920, H03K 2976, H03K 2950

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active

046021701

ABSTRACT:
A family of digital logic circuits constructed with resistive gate field effect transistors is provided. The logic circuits are comprised of AND and OR circuits, each implemented with resistive gate devices. In constructing the AND circuit, the resistive gate lies along the length of the channel region between the source and drain of the device. Logic input signals are selectively applied along the length of the channel region to the resistive gate. The device will conduct between source and drain only if all points along the channel are above the local threshold voltage of the channel region which will occur when appropriate logic signals are applied simultaneously to all logic input terminals. A logic OR device is realized when the resistive gate is formed transverse to the channel such that each input to the gate controls a portion of the channel between the source and drain. NAND and NOR circuits are provided using the resistive gate logic device in an inverter circuit.

REFERENCES:
patent: 3714522 (1973-01-01), Komiya et al.
patent: 3775693 (1973-11-01), Proebsting
patent: 3946418 (1976-03-01), Sigsbee
patent: 3968452 (1976-07-01), Sahara et al.
patent: 4074151 (1978-02-01), Buckley et al.
patent: 4157557 (1979-06-01), Sato et al.
patent: 4158239 (1979-06-01), Bertin
Hu et al, "A Resistive-Gated IGFET Tetrode"; IEEE Trans. on Electron Devices, vol. ED-18, No. 7, pp. 418-425; 7/1971.

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