Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion
Reexamination Certificate
1999-05-21
2001-03-27
JeanPierre, Peguy (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Digital to analog conversion
C341S144000
Reexamination Certificate
active
06208281
ABSTRACT:
TECHNICAL FIELD
This invention relates to a resistance ladder, exemplified by a R-2R resistance ladder in which two resistors of resistances R and 2R are connected together in a ladder structure. This invention also relates to a digital-to-analog converter and a semiconductor device using such a resistance ladder. In particular, this invention relates to an improvement that reduces variations in the resistances of a plurality of resistors comprised within the resistance ladder, thus increasing the digital-to-analog conversion accuracy thereof even further.
BACKGROUND OF ART
A plan view of a prior-art R-2R resistance ladder
500
as disclosed in Japanese Patent Publication No. 2-28269 is shown in
FIG. 19
, and an equivalent circuit diagram of the resistance ladder
500
of
FIG. 19
is shown in FIG.
20
.
This resistance ladder
500
comprises adjacent resistance groups
501
and
502
. Each of the resistance groups
501
and
502
is provided with first to third resistors
511
,
512
, and
513
. As shown in
FIG. 20
, the first resistor
511
is a resistor that forms one resistance (R) of the R-2R resistance ladder
500
and the second and third resistors
512
and
513
are resistors that form a combined resistance (2R). In
FIG. 19
, the first and third resistors
511
and
513
are disposed on either side of the second resistor
512
.
An insulation layer (not shown in the figure) is formed above these first to third resistors
511
to
513
. A wiring layer
515
, indicated by hatching in
FIG. 19
, is formed above the insulation layer. The wiring layer
515
is connected to the first to third resistors
511
to
513
via contact holes
520
. Note that a driver circuit is connected to the third resistor
513
.
However, with this structure, the surface areas of the wiring layer
515
corresponding to each of the first to third resistors
511
to
513
are different. In particular, the surface area of the wiring layer
515
corresponding to the third resistor
513
is extremely small. Thus the presence of the wiring layer
515
corresponding to regions above the first to third resistors
511
to
513
causes the resistances of the first to third resistors
511
to
513
to vary due to piezoelectric effects, and moreover the amounts of these variations are different in each of the first to third resistors
511
to
513
.
If a digital-to-analog converter (hereinafter called a D/A converter) is configured by using this resistance ladder, therefore, the conversion accuracy thereof will be inferior.
In another resistance ladder of the prior art, the driver circuits connected to the third resistors
513
of adjacent resistance groups
501
and
502
are not disposed at one side in the direction indicated by X in
FIG. 19
, but are disposed separately at one end and the other end thereof in the X direction. In this case, it is not possible to gather together the driver circuits at one side portion of the resistance ladder, so that an increased region of the layout of the semiconductor device is wasted, which leads to an increase in the chip surface area.
An objective of this invention is to provide a resistance ladder in which the amounts of variation in resistance caused by the correspondence between the resistors and the wiring layer are substantially the same for all resistors, and which enables a reduction in the surface area of the layout, together with a digital-to-analog converter and a semiconductor device that use this resistance ladder.
Another objective of this invention is to provide a resistance ladder which makes it possible to dispose a plurality of driver circuits at one side of a resistor formation region, together with a digital-to-analog converter and a semiconductor device that use this resistance ladder.
DISCLOSURE OF THE INVENTION
One aspect of this invention relates to a resistance ladder formed by connecting together a plurality of resistance groups, where each of the resistance groups has at least first to third resistors extending along a longitudinal axial direction, the resistance ladder comprising:
an insulation layer formed on top of each of the first to third resistors of each of the resistance groups and having contact holes at positions corresponding to end portions in the longitudinal axial direction of each of the first to third resistors;
a first wiring layer formed on top of the insulation layer, connecting together the first and second resistors and the second and third resistors within each of the resistance groups via the contact holes; and
a second wiring layer formed as the same layer as the first wiring layer and connecting together adjacent resistance groups;
wherein the second and third resistors in each of the resistance groups are disposed parallel to the longitudinal axial direction and on either side of the first resistor;
wherein the second wiring layer connects together one end in longitudinal axial direction of the first resistor of one of the adjacent resistance groups to the other end in the longitudinal axial direction of the first resistor of another of the adjacent resistance group, and is also formed to extend over other resistors positioned between the first resistors of the adjacent resistance groups; and
wherein surface areas of the second wiring layer corresponding to each of the first to third resistors in each of the resistance groups are set to be substantially equal.
With this aspect of the invention, the amounts of variation in the resistances of the first to third resistors are substantially equal. It is therefore possible to construct a D/A converter for converting an n-bit digital signal into an analog signal, by providing n resistance groups in this resistance ladder and connecting n driver circuits that are each connected to one of the resistance groups. Since the resistance ratios within the resistance ladder incorporated into this D/A converter are substantially constant, the conversion accuracy thereof can be improved. It is also possible to construct an A/D converter incorporating this D/A converter, in which case the conversion efficiency is similarly improved.
In addition, this invention makes it possible to dispose the driver circuits, which are connected to the resistance groups, at one side in the longitudinal axial direction, thus making it possible to avoid wastage of space. It is therefore possible to increase the degree of integration of a semiconductor device in which this resistance ladder is incorporated.
In such a case, if the second wiring layer is formed extending linearly at a constant angle of inclination with respect to the longitudinal axial direction, the surface areas of the second wiring layer corresponding to each of the first to third resistors can be set to be substantially equal.
Alternatively, the second wiring layer could be configured of a plurality of parallel wiring portions that are parallel to the longitudinal axial direction and a plurality of orthogonal wiring portions that are perpendicular to the longitudinal axial direction, connecting the parallel wiring portions. If the total length of the second wiring layer in the longitudinal axial direction is L in this case, the length of each parallel wiring portion corresponding to the first to third resistors can be set to be substantially L/3. This makes it possible to set the surface areas of the second wiring layer corresponding to each of the first to third resistors to be substantially equal.
In addition, the sum of the length of each parallel wiring portion connected to one end in the longitudinal axial direction of the first resistor in each resistance group plus the length of the parallel wiring portion connected to the other end in the longitudinal axial of the first resistor can be set to be substantially L/3.
Furthermore, a resistance group positioned at a far end portion could have a dummy wiring layer formed as the same layer as the second wiring layer. This makes it possible to ensure that the amount of variation in the resistances of the first to third resistors is substantially equal, even in the resistance gr
Fukuzawa Akihiro
Jinbo Keiji
Jean-Pierre Peguy
Oliff & Berridge
Seiko Epson Corporation
LandOfFree
Resistance ladder together with digital-analog converter and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Resistance ladder together with digital-analog converter and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Resistance ladder together with digital-analog converter and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2459656