Resist residue removal apparatus and method

Cleaning and liquid contact with solids – Processes – Using sequentially applied treating agents

Reexamination Certificate

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Details

C134S030000, C134S033000

Reexamination Certificate

active

06358329

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a resist residue removal apparatus and method, and more particularly, to an apparatus and method for removing resist residues after formation of an aluminum (Al) wiring pattern constituting a semiconductor integrated circuit.
2. Background Art
Miniaturization of a semiconductor integrated circuit is pursued in order to realize a high-speed, high-performance device. Miniaturization is required not only for an element section such as a transistor which acts as a drive section of the device but also for a multilayer wiring section.
In a case where aluminum (Al) is used for a wiring pattern, an aluminum wiring pattern is formed on a semiconductor device through sputtering of an aluminum alloy. A resist film is grown on the aluminum wiring pattern and is subjected to patterning and dry etching, thereby fine pattern processing of a semiconductor devices is carried out.
As a result, the aluminum wiring pattern may be diminished until it becomes equal in size to a hole which interconnects multilayer wiring patterns. As a result, a phenomenon may occur in which the interconnection hole is not completely covered with the aluminum wiring pattern.
An aluminum wiring pattern, which is offset from the interconnection hole so that the surface of the interconnection hole is exposed after formation of the aluminum wiring pattern, is called a borderless wiring pattern or a misalignment wiring pattern.
The resist pattern is removed from the semiconductor device including the borderless wiring pattern through ashing by use of oxygen plasma. However, the resist film cannot be completely removed through ashing, and resist still remains on the semiconductor device. For this reason, the wafer is subjected to a processing with a resist residues removal fluid and is rinsed with water.
FIG. 5
is a schematic representation showing the structure of a borderless wiring pattern that has been subjected to resist residue removal processing. In the drawing, reference numeral
1
designates an interlayer dielectric film;
2
designates an interconnection hole formed in the interlayer dielectric film;
3
designates a conductive material which is filled in the interconnection hole to thereby constitute a plug;
4
designates a barrier metal layer formed on the interlayer dielectric film; and
5
designates an aluminum wiring pattern partly connected to the plug
3
of the interconnection hole
2
.
Resist residue processing performed on a conventional semiconductor device having an aluminum wiring pattern involves the following problems.
More specifically, since aluminum is susceptible to erosion, aluminum may becomes thinner during rinsing process subsequent to removal fluid processing. Further, during the rinsing process, aluminum contained in the aluminum wiring pattern and a plug material (such as W) become eroded as a result of a local galvanic battery effect, and the aluminum wiring pattern
5
on the plug
3
may often become etched.
Copper (Cu) is sometimes added to the aluminum wiring pattern
5
in order to improve electromigration resistance. In many types of resist removal fluids currently used on such an aluminum wiring pattern, when the resist removal fluid is mixed with a large volume of water during the rinsing process, a component effective for removing resist residues becomes ionized, which in turn increases the reactivity of the resist removal fluid as well as the fluid's corrosive effect on aluminum. As a result, aluminum present around the copper (Cu) contained in the aluminum wiring pattern is etched, whereby copper (Cu) is precipitated.
This results in the deterioration of characteristics, such as a decrease in the yield of wiring patterns, an increase in wire resistance, and a drop in the reliability of a wiring pattern.
SUMMARY OF THE INVENTION
The present invention has been conceived to solve such a problem, and the object of the present invention is to provide a resist residue removal apparatus and method which enable improvement in the yield of wiring patterns by retarding local etching of an aluminum wiring pattern. Another object is to prevent an increase in the resistance of an aluminum wiring pattern by prevention of a reduction in the width thereof; and further object is to prevent precipitation of copper (Cu) in a Cu-containing aluminum wiring pattern.
According to one aspect of the present invention, there is provided an improved resist residue removal system for removing resist residue on a semiconductor wafer having an aluminum wiring pattern thereon. The system comprises at least a processing chamber for processing a wafer having resist residues, and the processing includes a removal fluid processing, washing, and drying. An apparatus is provided for introducing a specific gas selected from a group of oxidizing gas and non-oxidizing gas into the processing chamber corresponding to the type of the processing.
According to another aspect of the present invention, there is provided an improved method of removing resist residues from a semiconductor wafer having an aluminum wiring pattern thereon. In the method, the wafer is processed with a resist residues removal fluid in a processing chamber. Then, the wafer is washed with a washing fluid in a processing chamber. Then, the wafer is dried with a drying gas in a processing chamber. The atmosphere of the processing chamber is controlled according to the processing to which the semiconductor wafer is subjected.
Other and further objects, features and advantages of the invention will appear more fully from the following description.


REFERENCES:
patent: 5007981 (1991-04-01), Kawasaki et al.
patent: 5567574 (1996-10-01), Hasemi et al.
patent: 5980643 (1999-11-01), Jolley
patent: 6217667 (2001-04-01), Jolley
patent: 3-166724 (1991-07-01), None
patent: 4-356927 (1992-12-01), None
patent: 6-181191 (1994-06-01), None

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