Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame
Patent
1998-02-25
2000-10-17
Williams, Alexander O.
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
257691, 257698, 257784, 257712, 257675, 257676, 438123, 438124, H01L 2160, H01L 2350, H01L 2336
Patent
active
061336238
DESCRIPTION:
BRIEF SUMMARY
TECHNICAL FIELD
The invention relates to a semiconductor device characterized by lead construction and a method of making the same.
BACKGROUND OF ART
Semiconductor devices such as Very Large Scale Integrated Circuits (VLSIs) with a high degree of integration require a large number of electrodes (pads) for signal input and output on the chip and also a large number of power supply electrodes. This therefore requires a similarly large number of leads for connecting the electrodes.
Furthermore, when power is supplied to a semiconductor chip at a number of different points, if the wires for these different connections are of different lengths, they will have different resistances. As a result, there will be different voltage drops across them, and it will be difficult to ensure that the same voltage is applied to different electrodes. Additionally, if all the wires connecting the power supply to different electrodes are the same length, it is necessary to make them all equal to the longest wire, and thus the overall wire length is increased, resulting in an overall increase in the voltage drop.
JP 4-174551 discloses a semiconductor device that is designed to solve the foregoing problem. This semiconductor device provides a common inner lead laminated on the semiconductor chip circuit formation surface with an insulating adhesive. A plurality of inner signal leads is provided around the semiconductor chip, electrically connected to the semiconductor chip. Further, the semiconductor chip is sealed by molding resin while supported by the common inner lead.
This semiconductor device has advantages in that since no tab is provided to mount the semiconductor chip thereupon, tab to bonding wire shorting can be prevented, by using the common inner lead for power supply, the sharing of lead pins can be simply implemented. In particular, the provision of the common inner lead not only reduces the number of leads, but also reduces the voltage drop by shortening the wires.
However, in such a semiconductor device, the lamination of the common inner lead on the semiconductor chip surface imposes restrictions on the arrangement of the pads on the semiconductor chip surface. Also there are other problems such as contamination of the chip by the insulating adhesive that bonds the common inner lead to the semiconductor chip and bonding deficiencies caused by softening of the adhesive.
Further, JP 6-66351 discloses a semiconductor device in which a common inner lead is provided around a semiconductor chip. The common inner lead is not provided on the surface of the semiconductor chip, thus there are no restrictions on the arrangement of the pads on the semiconductor chip surface. Bonding deficiencies also are avoided.
However, since the tab on which the semiconductor chip is mounted is provided integrally on one lead, and the common inner lead is provided around this tab, it is difficult to ensure adequate insulation between the tab and the common inner lead. The common inner lead is formed in such a manner that one portion is cut off to avoid contacting the lead on which the tab is formed, and thus, placing restrictions on the design. Furthermore, such restrictions place further restrictions on the position at which the bonding is performed.
In recent years, with the increase in power consumption of the VLSI and similar devices, the demand for a plastic package with low cost and good heat radiation has increased. To meet this demand, in terms of the materials used, it has been considered to increase the thermal conductivity of the lead frame and sealing resin, and in terms of the structure, it has been considered to improve the heat radiation characteristics by changing the design of the lead frame or by adding a heat sink or radiator. In particular, the improvement of the heat radiation characteristics by adding a heat radiator is the most orthodox measure for Large Scale Integrated Circuits (LSIs) in which the power consumption is no more than about 2 watts per chip.
In consideration of the heat radiation, the inventors o
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M. Karmezos et al., EDQUAD--An Enhanced Performance Plastic Package, IEEE, pp. 63-66, 1994.
Otsuki Tetsuya
Yoshimori Kenzo
Seiko Epson Corporation
Williams Alexander O.
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