Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Patent
1992-01-22
1994-02-22
LaRoche, Eugene R.
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
257773, 257775, 257734, H01L 2348, H01L 2944
Patent
active
052890368
ABSTRACT:
A wiring layer structure of a resin sealed semiconductor integrated circuit, which is free from slide of wiring layer during heat cycle test, is disclosed. The slide is prevented by making an effective width of the wiring layer smaller by means of slits formed in the wiring layer. A reduction of area to be occupied by the wiring layer is realized by reducing a total width of the wiring layers by increasing the density of slits with increase of a distance from a corner of the chip.
REFERENCES:
patent: 4467345 (1984-08-01), Ozawa
patent: 4475119 (1984-10-01), Kuo et al.
patent: 4583111 (1986-04-01), Early
patent: 4631571 (1986-12-01), Tsubokura
patent: 4654692 (1987-03-01), Sakurai et al.
patent: 4739388 (1988-04-01), Packeiser et al.
patent: 4970572 (1990-11-01), Kato et al.
LaRoche Eugene R.
NEC Corporation
Nguyen Viet Q.
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