Resin-molded package with cavity structure

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material

Reexamination Certificate

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Details

C206S710000, C257S787000, C438S125000

Reexamination Certificate

active

11186794

ABSTRACT:
A package includes: a substrate having a ridged peripheral portion and a center portion defined by and lower in level than the ridged peripheral portion. A semiconductor chip is mounted on the center portion. A plurality of lead is electrically coupled to the semiconductor chip and penetrates the substrate outwardly from the center portion. The package also includes a cap defining a cavity space which accommodates the semiconductor chip. The cap has a cap bonding face bonded with a substrate bonding face of the ridged peripheral portion. The cap bonding face and the substrate bonding face are higher in level than the center portion.

REFERENCES:
patent: 5949655 (1999-09-01), Glenn
patent: 6011303 (2000-01-01), Tanaka et al.
patent: 6483030 (2002-11-01), Glenn et al.
patent: 1 096 563 (2001-05-01), None
patent: 2600689 (1997-01-01), None
patent: 3127584 (2000-11-01), None
patent: 2000006598 (2000-02-01), None

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